- Cisco (San Jose, CA)
- …**Your Impact:** You will be in the Silicon One development organization as a senior DFT verification lead in San Jose, CA. You will work with Front-end RTL ... backend physical design teams to understand chip architecture and drive high-quality DFT verification . **Key Essential Functions:** + Responsible for thorough… more
- Northrop Grumman (Jessup, MD)
- …deliver remarkable new advantages to the warfighter. We are seeking a front-end ASIC design engineer for design and verification of full-custom digital circuits. ... coding in Verilog, System Verilog or VHDL RTL + Circuit synthesis, formal verification , and static timing using state-of-the-art digital ASIC design tools +… more
- Google (Sunnyvale, CA)
- Senior DFT Static Timing Analysis Engineer, Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... static timing (ie, full chip timing signoff ownership, constraint authoring and verification , full chip static timing analysis and timing ECO creation, timing… more
- Cadence Design Systems, Inc. (Austin, TX)
- …who want to make an impact on the world of technology. We are looking for SoC/ ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate ... highly desirable for candidate to possess hands-on knowledge of synthesis, verification and debugging Verilog testbenches. Requirements; US citizenship preferred. +… more
- Cisco (San Jose, CA)
- …**Meet the Team** You will be part of the Silicon One development organization as an ASIC implementation engineer in San Jose, CA. As a member of this team you will ... Impact** You will be the lead to drive the DFT /DFx and quality process through the early product life...Computer Engineering required with at least 10+ years of ASIC Hardware Development experience. + Prior experience on hardware… more
- NVIDIA (Santa Clara, CA)
- …at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the ... We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously...critical role in shaping the architecture, design, implementation, and verification of DFT IPs for our next-generation… more
- Cisco (San Jose, CA)
- …**Your Impact:** You will be in the Silicon One development organization as an ASIC Implementation Technical Lead with a primary focus on Design-for-Test. You ... to ensure specifications and requirements are met + Leads technical expertise of a physical design function + Interfaces...DFT logic & IP integration; familiarity with functional verification + DFT CAD development - Test… more
- Cisco (San Jose, CA)
- …service provider networks. Cisco's silicon team offers a unique experience for ASIC engineers, combining the resources and stability of a large, multi-geography ... startup-style team. You'll collaborate with exceptional talent with deep ASIC design and development expertise. As part of a...oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing… more
- Northrop Grumman (Jessup, MD)
- …route, physical verification (LVS/DRC) + Proficient with Cadence and Siemens ASIC toolset eg, Innovus, Genus, Tempus, Calibre, etc. + Has working knowledge in ... our mission! Northrop Grumman Mission Systems (NGMS) is seeking a Sr. Staff ASIC Physical Design Engineer to support our growing engineering team in advanced… more
- SanDisk (Milpitas, CA)
- …requirements and specifications. + Coordinate effectively with SoC Design, SoC Design Verification , ASIC Validation, DFT , Physical Design, Hardware, Mixed ... it needs to keep our world moving forward. **Job Description** As the ASIC Project Technical Leader at SanDisk, you will be responsible for the development of… more