• Senior Principal ASIC Static Timing…

    Northrop Grumman (Linthicum Heights, MD)
    …perform or propose changes to fix them + Work closely with design, verification , design-for-test and physical design teams to optimize the timing and improve design ... of experience in Science, Technology, Engineering, Mathematics, or related technical fields; an additional 4 years of experience may...+ Experience in the full product life cycle of ASIC Design + Effective communication and presentation skills and… more
    Northrop Grumman (10/10/25)
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  • ASIC Physical Design Engineer, Annapurna…

    Amazon (Austin, TX)
    …distribution, timing optimization, place and route, power integrity analysis, and physical verification * Write Tcl or PERL scripts to improve physical design flows ... and methods * Collaborate with RTL, DFT designers to ensure high quality design implementation Basic Qualifications Bachelors' degree or higher in Electrical… more
    Amazon (09/16/25)
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  • Digital Verification Engineer

    Broadcom (San Jose, CA)
    …+ Prior experience in generating UVM RAL model + Prior experience in verification of the DFT design, architecture, and microarchitecture + Proficient with ... Broadcom is looking for a senior level Digital Design Verification engineer. In this highly visible role you will...this highly visible role you will be working on ASIC for data center connectivity applications. Qualifications include: +… more
    Broadcom (10/10/25)
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  • Technology Program Manager, Commodity Management

    Google (Sunnyvale, CA)
    …+ 8 years of experience in program management. + 8 years of experience in ASIC /chip design with leadership and technical ownership. + 8 years of experience with ... are critical to our next-generation products, contributing to the life-cycle of ASIC development while actively managing our external technical engagements. The… more
    Google (10/07/25)
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  • Senior Principal FPGA Engineer (Hybrid-Puerto…

    RTX Corporation (Aguadilla, PR)
    …+ Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA verification flow + Contribute to engineering estimates for ... new program pursuits + Provide technical leadership for project verification teams by...coding and simulation experience in VHDL or Verilog + ASIC / FPGA lab validation with advanced lab equipment… more
    RTX Corporation (09/03/25)
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  • Principal Digital Design Engineer

    Renesas (Duluth, GA)
    …and high-speed design concepts + Participate in design, architecture, and verification reviews + Oversee digital backend design, including synthesis, static timing ... and logic equivalence checking + Create documentation targeting design, verification , and test teams + Assist with the proposal,...of experience + 8+ years of direct experience in ASIC /IC design with deep knowledge of the entire IC… more
    Renesas (07/31/25)
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  • Sr. Physical Design Methodology Engineer,…

    Amazon (Cupertino, CA)
    …Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help ... scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and… more
    Amazon (07/26/25)
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  • Principal Logic Design Engineer

    Microsoft Corporation (Austin, TX)
    …focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are ... closure of high-performance digital IP. + Collaborate with the verification team to ensure the implementation meets both architectural...+ Interface with physical design (PD), design for test ( DFT ), and other teams to optimize tradeoffs within the… more
    Microsoft Corporation (10/11/25)
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  • System Level Product Development Engineer

    NVIDIA (Santa Clara, CA)
    …yield enhancement and spec validation. + Partner with other engineering groups including ASIC , DFT , ATE, silicon validation, fab process, software and quality ... groundbreaking innovations involving crafting creative solutions for system level diag, verification and post-silicon validation of some of the industry's most… more
    NVIDIA (09/20/25)
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  • Senior System Level Product Development Engineer

    NVIDIA (Santa Clara, CA)
    …yield enhancement and spec validation + Partner with other engineering groups including ASIC , DFT , ATE, silicon validation, fab process, software and quality ... groundbreaking innovations involving crafting creative solutions for system level diag, verification and post-silicon validation of some of the industry's most… more
    NVIDIA (09/20/25)
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