• Senior Technical Program Manager - DFX…

    NVIDIA (Santa Clara, CA)
    …program management or engineering leadership. + Strong understanding of ASIC /SoC design, verification , bring-up, and productization flows (RTL-to-release). ... We seek a Senior Technical Program Manager to lead Design-for-Test (DFX) engineering...product release, ensuring timely delivery and alignment across development, verification , test, and operations. + Develop detailed project schedules… more
    NVIDIA (10/17/25)
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  • Principal Digital Design Engineer

    Renesas (Duluth, GA)
    …and high-speed design concepts + Participate in design, architecture, and verification reviews + Oversee digital backend design, including synthesis, static timing ... and logic equivalence checking + Create documentation targeting design, verification , and test teams + Assist with the proposal,...of experience + 8+ years of direct experience in ASIC /IC design with deep knowledge of the entire IC… more
    Renesas (12/12/25)
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  • Lead Application Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …with Cadence EDA tools for Synthesis, Logical Equivalency Checking (LEC), Design-for-Test ( DFT ), Place & Route and Static Timing Analysis (STA).You may get involved ... ideal for someone with several years of hands on ASIC /IC design experience who is looking for a new...an absorbing customer facing role. This role requires strong technical capability in Cadence tools (or similar), flow development,… more
    Cadence Design Systems, Inc. (12/03/25)
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  • Electrical Engineer 2

    RTX Corporation (Richardson, TX)
    …Hardware engineering candidate to be involved in the design, implementation, verification , and integration of a wide variety of high-performance analog/digital ... antenna design, and power amplification. + You may provide technical inputs for project design teams by breaking down...the future on these skills, that include requirements capture, ASIC / FPGA digital architecture and design using RTL,… more
    RTX Corporation (12/12/25)
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  • Sr. Physical Design Methodology Engineer,…

    Amazon (Cupertino, CA)
    …Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help ... scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and… more
    Amazon (10/25/25)
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  • Director, Hardware Engineering

    Cisco (San Jose, CA)
    …bring-up, device characterization, reliability screening, and production test. 5) Provide technical leadership in Design for Test ( DFT ), scan/ATPG, ... + Multi-functional Collaboration: 1) Partner closely with silicon architecture, ASIC design, verification , software, reliability, manufacturing operations, and… more
    Cisco (12/02/25)
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  • SoC Physical Design Engineer

    Google (Sunnyvale, CA)
    …areas such as synthesis, place and route, Static Timing Analysis (STA), verification , or power analysis. **Preferred qualifications:** + Master's degree or PhD in ... complex SoC. + Experience with multiple-cycles of SoC in ASIC design. + Experience with scripting languages such as...as Perl, Python, or Tcl. + Experience with layout verification and design rules. + Experience in IP integration… more
    Google (12/11/25)
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  • Hardware Developer Intern

    IBM (Dallas, TX)
    …of the development, test, and support process, such as: * Design for Test ( DFT ) and verification * Signal integrity, power integrity, and analysis * Product ... (RTL/VHDL/Verilog), and circuit simulation tools (SPICE) is preferred." **Required technical and professional expertise** Pursuing a Bachelor's or Master's Degree… more
    IBM (12/02/25)
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  • Sr. PD Methodology Engineer, Annapurna Labs…

    Amazon (Austin, TX)
    …Design from RTL-to-GDSII - Understanding of other sign-off activities (ir/em, physical verification , timing closure, DFT ) - 3+ years of scripting experience ... Amazon's leadership principles requirements for this role - Meets/exceeds Amazon's functional/ technical depth and complexity for this role Amazon is an equal… more
    Amazon (10/25/25)
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  • System Level Product Development Engineer

    NVIDIA (Santa Clara, CA)
    …yield enhancement and spec validation. + Partner with other engineering groups including ASIC , DFT , ATE, silicon validation, fab process, software and quality ... groundbreaking innovations involving crafting creative solutions for system level diag, verification and post-silicon validation of some of the industry's most… more
    NVIDIA (09/20/25)
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