• Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design ... for mixed-signal functions like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs in state-of-the-art sub-micron CMOS technologies using… more
    NVIDIA (12/11/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear from you! We are looking ... for a Senior Mask Layout Design Engineer , someone who is excited to...mixed-signal functions like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs in groundbreaking sub-micron CMOS… more
    NVIDIA (11/27/25)
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  • Principal Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …passionate engineers to help achieve that mission. We are looking for a Principal Design Engineer to work in the dynamic Microsoft Artificial Intelligence System ... where applicable. **Preferred Qualifications** + 10+ years expertise in Digital Design including microarchitecture specification development, RTL coding… more
    Microsoft Corporation (12/14/25)
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  • Senior Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …Integrated Circuits ( ASIC )/SOC designs. + 4+ years expertise in Digital Design including microarchitecture specification development, RTL coding in ... engineers to help achieve that mission. We are looking for a Senior Design Engineer to work in the dynamic Microsoft Artificial Intelligence System on Chip… more
    Microsoft Corporation (12/13/25)
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  • RTL Design Engineer , Multimedia…

    Google (Mountain View, CA)
    RTL Design Engineer , Multimedia and Machine Learning Accelerators _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, ... Property (IP)(Camera, Display or COdec) or Machine Learning IP. + Experience with ASIC design methodologies for clock domain checks and reset checks. +… more
    Google (11/20/25)
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  • Senior FPGA Design Engineer

    Tarana Wireless (Milpitas, CA)
    …alongside some of the brightest minds in the industry. If you're passionate about digital design , solving complex problems, and building products that make a ... advanced FPGAs powering our next-gen wireless base stations and ASIC emulation platforms. You'll play a vital role in...logic design experience + Expertise in high-speed digital design + Hands-on experience with Xilinx… more
    Tarana Wireless (11/11/25)
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  • Senior Principal Design Verification…

    BAE Systems (Nashua, NH)
    …random, self-checking testbenches in SystemVerilog/UVM, OVM, and/or VHDL + Experience with FPGA/ ASIC design and verification tools (Mentor Questa or Cadence) + ... required: + Perl/Python + C /Java + Git/Jira/BitBucket + Digital Signal Processing + Matlab/Simulink + Working knowledge of...based on position level and/or job specifics. **Senior Principal Design Verification Engineer - FPGA - (Sign-on… more
    BAE Systems (10/24/25)
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  • Staff SEIT Lead Systems Engineer

    Northrop Grumman (Jessup, MD)
    …experience and knowledge in design , development, creation, and modification of digital logic designs implemented in FPGA, or ASIC solutions. + Demonstrated ... to capture and enhance engineering artifacts + Demonstrated knowledge of Hardware/Software/ Digital design and engineering through full product life cycle… more
    Northrop Grumman (12/05/25)
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  • R&D Engineer IC Design 3

    Broadcom (Irvine, CA)
    …Engineering and and 3+ years of related experience_ + Good knowledge of high speed digital circuit design . + Good knowledge of ARM subsystem + Good knowledge of ... apply.** **Job Description:** + This opening work on chip design which enables 10Gbps/40Gbps/100Gbps/400Gbps backplane/cable/optical fiber communication and 5G... digital signal processing and error correction code is a… more
    Broadcom (12/03/25)
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  • Power Electronics Responsible Product…

    Lockheed Martin (Littleton, CO)
    …- - - **Key activities you will accomplish in this role:** * Support the primary design engineer with any power design activities that will be required for ... layout oversight * Parts selection * Flow FPGA or ASIC design requirements to ASIC /FPGA...or development lab experience * Experience leading/supporting Analog &/or Digital design for new development * Experience… more
    Lockheed Martin (10/31/25)
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