• Senior Technologist, ASIC Development…

    SanDisk (Milpitas, CA)
    …+ Coordinate effectively with SoC Design , SoC Design Verification, ASIC Validation, DFT, Physical Design , Hardware, Mixed Signal IPs, Foundry, ... our solutions have become the beating heart of the digital world we're living in and that we have...enforce the highest industry standards and best practices in ASIC design development. Provide mentorship and guidance… more
    SanDisk (10/10/25)
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  • Nvidia 2026 Internships: Hardware ASIC

    NVIDIA (Santa Clara, CA)
    By submitting your resume, you're expressing interest in one of our 202 6 Hardware ASIC Design Internships. We'll review resumes on an ongoing basis, and a ... to the following areas could be required : + Digital Systems, Digital Design , VLSI...Noise Analysis, Silicon Instrumentation and Measurement + CAD and Physical Design Methodologies (Flow and Tool s… more
    NVIDIA (09/02/25)
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  • ASIC Library Characterization Engineer

    CTG (Rochester, MN)
    …to ensure high-quality, tape-out-ready deliverables **What You Bring** * 5+ years in ASIC library characterization or physical design * Hands-on experience ... CTG is seeking an ASIC Library Characterization Engineer to support advanced ...SKILL) * Understanding of Liberty, LEF, hard-macro abstractions, and digital /AMS modeling * Verilog/SystemVerilog proficiency (VHDL acceptable) * Experience… more
    CTG (11/19/25)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled ... **Meet the Team** You will be part of the Silicon One development organization as an ASIC implementation engineer in San Jose, CA. As a member of this team you will… more
    Cisco (11/12/25)
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  • Sr. ASIC /FPGA Design Verification…

    Teradyne (North Reading, MA)
    …+ Experience in logic design writing RTL in Verilog HDL + Experience with physical design tools from FPGA vendors (Vivado and/or Quartus) + Ability to debug ... and delivers better business results. Opportunity Overview Our Logic Design Engineering team is seeking a digital ...Logic Design Engineering team is seeking a digital logic Verification Engineer who preferably also has experience… more
    Teradyne (11/19/25)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... and post silicon validation phases with additional exposure to physical design signoff activities. **Key Contributions:** +...power how humans and technology work together across the physical and digital worlds. These solutions provide… more
    Cisco (11/22/25)
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  • Senior Principal ASIC Static Timing…

    Northrop Grumman (Linthicum Heights, MD)
    …or propose changes to fix them + Work closely with design , verification, design -for-test and physical design teams to optimize the timing and improve ... best work of your career. Northrop Grumman Mission Systems, Digital Technologies Group, is seeking a Static Timing Engineer...of experience in the full product life cycle of ASIC Design **Preferred Qualifications:** + Master's Degree… more
    Northrop Grumman (11/13/25)
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  • Senior DSP and ASIC Engineer

    Broadcom (San Jose, CA)
    …+ Demonstrate the ability to work through technology challenges and physical implementation issues associated with high-performance design implementations. + ... Matlab, Perl, Python or other scripting languages. + Familiarity with digital chip design concepts, such as clocking, timing, pipelines, and performance vs… more
    Broadcom (11/15/25)
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  • Digital Design Engineer

    Meta (Redmond, WA)
    …quality RTL in collaboration with Digital Verification (DV) 3. Support back end physical design (PD) through STA and SDCs 4. Develop system tests in C ... **Summary:** We are looking for a Digital Design Engineer to support our...experience 8. Communication and collaboration skills 9. Knowledge of digital SoC integration and ASIC architecture 10.… more
    Meta (10/05/25)
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  • Digital IC Design Engineer

    Texas Instruments (Santa Clara, CA)
    …**Minimum requirements:** + BSEE with 12 years or MSEE with 10 years of digital /mixed signal ASIC architecture/ design experience + Successfully taped out ... + A thorough understanding of digital logic design + Strong understanding of ASIC ...+ Knowledge of MATLAB + Knowledge or experience with physical design flow + Strong time management… more
    Texas Instruments (11/21/25)
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