• Digital Integrated Circuit Design

    Snap Inc. (Vancouver, WA)
    …MSEE or relevant years of experience + 10​​+ years of experience in ASIC Design Verification Preferred Qualifications: + Experience with entire verification ... learning, and working better together. We're looking for a Design Verification Engineer to join the Spectacles...I2C, SPI protocols and embedded microcontroller + Familiarity with ASIC test or production flow + Ideal candidate is… more
    Snap Inc. (12/03/25)
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  • RFIC Design Engineer (Silicon…

    SpaceX (Redmond, WA)
    RFIC Design Engineer (Silicon Engineering) Redmond, WA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... ultimate goal of enabling human life on Mars. RFIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...CMOS processes + Work with system architects, modem/DSP and ASIC engineers to partition functions between hardware and software… more
    SpaceX (01/03/26)
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  • RFIC Design Engineer (Starshield)

    SpaceX (Hawthorne, CA)
    RFIC Design Engineer (Starshield) Hawthorne, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... possible, with the ultimate goal of enabling human life on Mars. RFIC DESIGN ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch… more
    SpaceX (10/23/25)
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  • HBM Integration Engineer

    Broadcom (Fort Collins, CO)
    …and built-in self-test (BIST). + General knowledge of semiconductor technology and ASIC design flow including Verilog simulation and timing analysis. Verilog ... with Broadcom's ASIC customers on their custom silicon products during design , bring-up, as well as debugging performance or HBM memory issues. + Develop… more
    Broadcom (12/03/25)
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  • Custom SOC IP Verification Engineer

    NVIDIA (Santa Clara, CA)
    …grasp of ASIC verification methodologies. What you'll be doing: + Responsible for ASIC design verification for various processing blocks within a SOC, with a ... place to be. This role specifically requires a skilled ASIC Verification Engineer with expertise in cache...and complete test plans for cache coherency verification of ASIC -based SoCs using UVM-based environments. + Design more
    NVIDIA (12/19/25)
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  • Electronics Engineer , Avionics…

    Lockheed Martin (King Of Prussia, PA)
    …Electrical/Electronics Integration & Test Engineer ASIC /FPGA Engineer Component Engineer Analog & Power Circuit Design Engineer By applying to ... **Description:** Join Our Team as a Circuit Design Engineer where you will work on the development of a sophisticated state\-of\-the\-art avionics product in a… more
    Lockheed Martin (12/30/25)
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  • Principal Digital Verification Engineer

    Northrop Grumman (Linthicum Heights, MD)
    …bus or I/O interfaces + Experience with SystemVerilog Assertions (SVA) + FPGA/ ASIC design and/or development process experience + Experience with scripting ... are looking for you to join our team as a Principal Digital Verification Engineer /Senior Principal Digital Verification Engineer based out of Linthicum, MD or… more
    Northrop Grumman (01/02/26)
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  • Digital Design Engineer

    Meta (Sunnyvale, CA)
    **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a industry-leading group of researchers and engineers, and use your digital ... ICs to drive our industry leading wearable systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block level… more
    Meta (12/20/25)
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  • Physical Design Engineer , Google…

    Google (Sunnyvale, CA)
    Physical Design Engineer , Google Cloud _corporate_fare_ Google...route for SoC or with multiple-cycles of SoC in ASIC design . **About the job** In this ... on TPU architecture and its integration within AI/ML-driven systems. As a Physical Design Engineer , you will collaborate with RTL, design for testing (DFT),… more
    Google (12/25/25)
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  • RTL Design Engineer , University…

    Google (Sunnyvale, CA)
    RTL Design Engineer , University Graduate, PhD, Machine Learning _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving ... and its integration within AI/ML-driven systems. As an RTL Design Engineer , you will be part of... and document one or more blocks of an ASIC , including functionality and timing. + Work closely with… more
    Google (12/18/25)
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