• Associate FPGA / ASIC Design

    The MITRE Corporation (Bedford, MA)
    …such as: + Real-time communication and sensor systems leveraging cutting-edge ASIC design , FPGA technology, and Software-Defined Radio (SDR) platforms ... background in Field-Programmable Gate Array (FPGA) and/or Application-Specific Integrated Circuit ( ASIC ) design to support advanced research and development… more
    The MITRE Corporation (11/17/25)
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  • FPGA/ ASIC Engineer (Silicon…

    SpaceX (Redmond, WA)
    …to work extended hours and weekends as needed COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer /Level I: $122,500.00 - $145,000.00/per year ... FPGA/ ASIC Engineer (Silicon Engineering) Redmond, WA...ASIC /FPGA Design Engineer /Level II: $140,000.00 - $170,000.00/per year...ASIC /FPGA Design Engineer /Level II: $140,000.00 - $170,000.00/per year Your actual level… more
    SpaceX (11/26/25)
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  • Senior ASIC Physical Design

    Cisco (Maynard, MA)
    …working in a smaller ASIC team can provide. Your Impact As a Physical Design Engineer , you will play a key role in the full RTL-to-GDSII implementation flow ... Engineering and 4+ years of related experience * Hands-on experience in ASIC physical design and implementation * Experience with place & route using tools such… more
    Cisco (12/21/25)
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  • Sr. ASIC Design Engineer

    Amazon (Austin, TX)
    …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... correct clock/reset/functional/DFT signal routing - As a key member of the ASIC design team, you will implement and deliver high performance, area and power… more
    Amazon (12/30/25)
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  • Principal Analog ASIC Design

    Ralliant (Beaverton, OR)
    …processing (such as amplifiers, PLLs, ADCs, DACs, etc.) + Skilled in using modern ASIC design tools. + Capable of performing analog and RF analysis without ... group of engineers and managers to develop leading solutions using state-of-the-art design tools. **Responsibilities:** + Utilize powerful ASIC tools to build… more
    Ralliant (11/25/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... and DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks and all… more
    NVIDIA (10/28/25)
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  • ASIC Clocks Design Engineer

    NVIDIA (Santa Clara, CA)
    …Make the choice to join us today. The clocks group is looking for an outstanding ASIC engineer to join the team. The Team is responsible for crafting all aspects ... and DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks and all… more
    NVIDIA (12/10/25)
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  • Senior ASIC Design Engineer

    Palo Alto Networks (Santa Clara, CA)
    …CE, or CS (MSEE or equivalent military experience preferred). + 10+ years' front-end ASIC design ownership, shipping 2+ chips to mass production. + Solid ... and the kind of precision that drives great outcomes. **Your Career** Join our ASIC team and help deliver the digital logic that powers our next-generation firewall… more
    Palo Alto Networks (12/15/25)
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  • ASIC Design Engineer - New…

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a ... in micro-architecture and RTL development (Verilog). + Good understanding of ASIC design flow including RTL design , verification, logic synthesis and… more
    NVIDIA (11/18/25)
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  • Lead ASIC Design Engineer

    Amazon (Austin, TX)
    …refugee or granted asylum. Key job responsibilities Key job responsibilities RTL Design and development of custom blocks. Integration of large subsystems Gate Level ... Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic… more
    Amazon (12/26/25)
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