• Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are looking for a Senior ASIC Design Engineer to...paths. + A deep understanding of ASIC design flows including RTL design , verification ... join our Switch Silicon team. As a Design Engineer at NVIDIA, you'll join a...in RTL, and deliver a fully verified, synthesis/timing clean design . + Collaborate with architects, verification engineers,… more
    NVIDIA (11/20/25)
    - Related Jobs
  • ASIC Design Engineer

    NVIDIA (Austin, TX)
    NVIDIA is looking for an ASIC Design Engineer with...the crowd: + Prior experience in ASIC verification . + Knowledge of Clocks/Resets design and ... all products at NVIDIA. + Act as a "DevOps" engineer for automated RTL generation by developing new features... verification . + Exposure to CDC related design / verification flows. + Exposure to backend flows… more
    NVIDIA (11/19/25)
    - Related Jobs
  • Sr. ASIC Design Engineer

    Amazon (Austin, TX)
    …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... signal routing - As a key member of the ASIC design team, you will implement and...design . - Work with with architects, other designers, verification teams, pre- and post-silicon validation teams, synthesis, timing… more
    Amazon (12/30/25)
    - Related Jobs
  • Senior Reset and Boot ASIC Engineer

    NVIDIA (Santa Clara, CA)
    …Reset and Boot. + Collaborate with architects, ASIC designers, and verification engineers to design sophisticated system-level modules such as Floorsweep, ... NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ...doing: + Be an integral part of the System ASIC Design team to help with the… more
    NVIDIA (12/30/25)
    - Related Jobs
  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation,...to collaborate with multiple teams. + Experience in RTL design (Verilog), verification and logic synthesis. +… more
    NVIDIA (10/28/25)
    - Related Jobs
  • Senior ASIC Physical Design

    Google (Sunnyvale, CA)
    Senior ASIC Physical Design Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and mentoring ... behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex...architecture and its integration within AI/ML-driven systems. As an ASIC Physical Design Engineer , you… more
    Google (12/18/25)
    - Related Jobs
  • ASIC Clocks Design Engineer

    NVIDIA (Santa Clara, CA)
    …Make the choice to join us today. The clocks group is looking for an outstanding ASIC engineer to join the team. The Team is responsible for crafting all aspects ... DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation,...to collaborate with multiple teams. + Experience in RTL design (Verilog), verification and logic synthesis. +… more
    NVIDIA (12/10/25)
    - Related Jobs
  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... NVIDIA's next generation GPUs + Partner with RTL and Design Verification engineers to ensure delivery meets...ASIC design flow including front end design and verification , DFT, and timing analysis… more
    NVIDIA (11/26/25)
    - Related Jobs
  • ASIC /FPGA Research Engineer

    University of Southern California (Arlington, VA)
    …more secure future. ISI's CS&T Division has an opening in Arlington, VA for an ASIC /FPGA Research Engineer - Digital Design , to perform front-end digital ... design of advanced ASIC or FPGA-based prototypes addressing problems of national importance....FPGA-based design and bring-up + Experience with design verification + Familiarity with agile hardware… more
    University of Southern California (11/19/25)
    - Related Jobs
  • Senior ASIC Design Engineer

    Palo Alto Networks (Santa Clara, CA)
    …CE, or CS (MSEE or equivalent military experience preferred). + 10+ years' front-end ASIC design ownership, shipping 2+ chips to mass production. + Solid ... design from specification through silicon bring-up, working with world-class verification and physical- design engineers to hit aggressive performance, power,… more
    Palo Alto Networks (12/15/25)
    - Related Jobs