- Amazon (Sunnyvale, CA)
- …Engineering, related discipline, or equivalent experience * 5+ years of experience in FPGA/ ASIC design verification * Experience planning, developing, and ... groundbreaking new system with few legacy constraints. The FPGA verification engineer will work with design...Experience developing and implementing test plans. * Experience with FPGA/ ASIC design and verification tools… more
- NVIDIA (Santa Clara, CA)
- …cycles, this is your place to be. This role specifically requires a skilled ASIC Verification Engineer with expertise in cache coherency protocols and ... NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next... methodologies. What you'll be doing: + Responsible for ASIC design verification for various… more
- Northrop Grumman (Linthicum Heights, MD)
- …career. We are looking for you to join our team as a Principal Digital Verification Engineer /Senior Principal Digital Verification Engineer based out of ... This requisition may be filled as a Principal Digital Verification Engineer or a Senior Principal Digital...I/O interfaces + Experience with SystemVerilog Assertions (SVA) + FPGA/ ASIC design and/or development process experience +… more
- NVIDIA (Austin, TX)
- …+ Collaborate with architecture, ASIC , FPGA, mixed signal, software and system design teams to develop end to end verification environments What We Need ... you! We are now looking for a highly motivated engineer to join this dynamic and innovative system team....of proven experience in ASIC or FPGA verification or board design / signal integrity… more
- Capgemini (Seattle, WA)
- **Job Description:** We are seeking a SoC Design Verification Engineer to join our team 100% onsite in either Seattle, WA or Santa Clara, CA. The ideal ... Skills:** + Proven track record of first-pass success in ASIC development cycles. + Bachelor's degree in Computer Science,...**Organization:** _ERD PPL US_ **Title:** _Lead E/E & Semiconductor Engineer - SOC Design Verification … more
- ManpowerGroup (Santa Clara, CA)
- Our client, a leader in the technology industry, is seeking a Design Verification Engineer to join their team. As a Design Verification Engineer , ... which will align successfully in the organization. **Job Title:** Design Verification Engineer **Location:** Santa...verification libraries like UVM. + 10+ years of ASIC design verification experience. +… more
- Butler America (Sunnyvale, CA)
- FPGA Design / Verification Engineer Location: Sunnyvale, CA Job ID: #71390 Pay Range: $75-90 The selected candidate will be responsible for ASIC & FPGA ... provide support and technical direction to junior engineers. Overall contribution to design , simulation, verification , integration & test of complex, high speed… more
- BAE Systems (San Diego, CA)
- …may be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **117193BR** ... self-checking testbenches in SystemVerilog/UVM, OVM, and/or VHDL + Experience with FPGA/ ASIC design and verification tools (Mentor Questa or Cadence) +… more
- NVIDIA (Santa Clara, CA)
- …we need to see: + BS / MS or equivalent experience. + 3+ years of ASIC verification experience of complex design units displaying good attention to detail, ... NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our Tegra SoC...Background with System Verilog and UVM based methodology for ASIC verification . Ways to stand out from… more
- BAE Systems (Westminster, CO)
- …by the US Secretary of Education, US Department of Education. + Solid FPGA/ ASIC Verification development methodology. + Experience with System Verilog and UVM, ... specifications, cost, schedule, and resource requirements for FPGA or ASIC verification plans. + Familiarity with Signal...on position level and/or job specifics. **Senior Principal FPGA Verification Engineer - $15K Sign On Bonus**… more