- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification . The NVIDIA Clocks ... reset logic to various units in SOC and GPU ASIC . The complexity of the clocks and resets design...industry-standard verification flows like SV constraint random verification , UVM, Formal Verification , Coverage… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and...as VCS-XA or equivalent tools, Gate Level Simulation or Formal Equivalence domains. + Proficiency in scripting language, such… more
- Northrop Grumman (Jessup, MD)
- …in Verilog, System Verilog or VHDL RTL + Circuit synthesis, formal verification , and static timing using state-of-the-art digital ASIC design tools + ... We are seeking a front-end ASIC design engineer for design and verification of full-custom...test plans. Must be knowledgeable in synthesis, SDC constraints, formal verification , and static timing. Knowledge of… more
- Amazon (Sunnyvale, CA)
- …in the validation of ASIC implementations in Verilog/SystemVerilog . Run formal verification of complex blocks to ensure functional correctness . Work ... Matlab model : development or DV integration experience - Familiarity with formal verification techniques - Strong written and verbal skills Amazon is an equal… more
- SpaceX (Sunnyvale, CA)
- …of design blocks using Verilog/SystemVerilog + Familiar with UPF (unified power format), formal verification , and DRC rule checking experience + Ability to work ... ASIC /SOC DFT Engineer (Silicon Engineering) Sunnyvale,...weekends as needed COMPENSATION AND BENEFITS: Pay range: Design Verification Engineer /Level I: $130,000.00 - $155,000.00/per year… more
- Lockheed Martin (Denver, CO)
- …Citizen** \. **Desired Skills:** * Experience in modern ASIC /FPGA/SoC verification strategies as appropriate, including UVM/SystemVerilog, emulation, formal ... **Description:** Join Our Team as an ** ASIC /FPGA Principal SoC Engineer ** where you...system cost and schedule\. * Partner with a Principal Verification Engineer to architect cohesive approaches to… more
- Amazon (North Reading, MA)
- …digital verification , preferably in areas of image processing. - Familiarity with formal verification techniques - Lab debug experience and/or FPGA debug - ... highly differentiated silicon into Blink and Ring battery powered devices. Our verification team works on state-of-the art SoCs in a vertically integrated team… more
- NVIDIA (Santa Clara, CA)
- …with various stages in the ASIC design flow including functional and formal verification , emulation, synthesis & timing analysis, power estimation and ECO + ... for our Memory Controller team! As a Senior ASIC Engineer , you'll join a group of...for micro-architecture and design including RTL design, synthesis, functional verification , and timing analysis using groundbreaking CAD tools and… more
- L3Harris (Herndon, VA)
- …and cyber domains in the interest of national security. Job Title: Sr. Specialist ASIC /FPGA Senior Design Engineer Job Code: 30428 Job Location: Herndon, VA ... customers in more than 100 countries. Job Description: Reporting to the Manager, Engineering ( ASIC /FPGA), the Senior Design Engineer will be part of the key … more
- L3Harris (Camden, NJ)
- …land, sea and cyber domains in the interest of national security. Job Title: ASIC /FPGA Design Engineer (SMES) Job Code: 32295 Job Location: Camden, NJ Schedule: ... Preferred. + 5+ year's equivalent experience developing, implementing, and verification of high-performance communications/networking ASIC /FPGA products. +… more