• Chip Integration Engineer

    Broadcom (San Jose, CA)
    …Group at Broadcom has brought some of the most complex and cutting-edge networking ASIC 's and multichip solutions to market over the last decade. The group develops ... ASIC 's for L2/L3 switch routing. These products support the...microarchitecture and interface definition and review. 4). Planning physical implementation of chip level blocks and working on initial… more
    Broadcom (11/19/25)
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  • Sr. SerDes Characterization and Validation…

    SpaceX (Irvine, CA)
    …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: ASIC Validation Engineer /Senior: $160,000.00 - $220,000.00/per year Your actual level… more
    SpaceX (11/18/25)
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  • Lead, Electrical Engineer -FPGA

    L3Harris (Rochester, NY)
    …domains in the interest of national security. Job Title: Lead, Electrical Engineer -FPGA Job Code: 30336 Job Location: Rochester, NY Job Schedule: 9/80; Employees ... and/or DSP circuits in programmable logic using FPGA devices. Equivalent experience in ASIC design is also applicable. + Broad experience in embedded system design… more
    L3Harris (10/29/25)
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  • Staff Lead Design Verification Engineer

    Northrop Grumman (Annapolis Junction, MD)
    …a culture of design. We are seeking an exceptional Senior Functional Verification Engineer specializing in ASIC and FPGA technologies. The ideal candidate will ... & Test (SEIT) department is seeking a Staff Lead Design Verification Engineer to join our team and develop these technologies into high-performance computing… more
    Northrop Grumman (10/16/25)
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  • Senior Technical Lead - Signal / Power Integrity…

    Cisco (San Jose, CA)
    …Provider SI team is seeking a Senior Technical Lead, Signal/Power Integrity Engineer for the design and analysis of high-speed interconnects and power distribution ... be working in a larger team, collaborating closely with system architects, ASIC engineers, package engineers, and versatile and knowledgeable SI/PI engineers in the… more
    Cisco (11/13/25)
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  • DFT Engineer

    Broadcom (San Jose, CA)
    …Candidate Account, please Sign-In before you apply.** **Job Description:** **Principal DFT Engineer ** Broadcom's ASIC Product Division is seeking candidates for ... programs all the way from chip level DFT specification, through to implementation and verification culminating in successfully releasing products to production. The… more
    Broadcom (09/05/25)
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  • Digital Design Engineer

    Meta (Redmond, WA)
    **Summary:** We are looking for a Digital Design Engineer to support our Reality Labs Silicon AI Research team. We build research silicon to demonstrate and ... integrate advanced IP and AI accelerators into SOC/ ASIC solutions to enable in-system testing and prototyping. The...next generation AI and AR solutions.As a Digital Design Engineer (DDE), you will be a key contributor in… more
    Meta (10/05/25)
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  • Electrical or Computer Engineer - Trusted…

    Kratos Defense & Security Solutions, Inc. (Crane, IN)
    …modeling and simulating analog and digital architectures. + +2 years of ASIC development and design implementation and verification using Verilog/VHDL + ... assurance technologies and techniques. + Experience with stress testing FPGA and ASIC designs. + Experience modeling and simulating analog and digital architectures.… more
    Kratos Defense & Security Solutions, Inc. (11/20/25)
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  • Sr. Communication Systems Design Engineer

    Amazon (Austin, TX)
    …to unserved and underserved communities around the world. As a Systems Engineer , this role is primarily responsible for the design, development and integration ... for the Amazon Leo communication system. * Work with ASIC development teams to build power/area efficient L1/L2 HW...Amazon Leo SoCs. * Provide specifications and work with implementation teams on the development of embedded L1/L2 HW/SW… more
    Amazon (09/20/25)
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  • CPU Design Methodology Engineer

    NVIDIA (Hillsboro, OR)
    …is responsible to our environment. The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip ... We are now looking for a CPU Design Methodology Engineer ! The complexity of chip development has greatly increased...to build complex chips and interact directly with unit-level ASIC , Physical Design, CAD, Package Design, Software, DFT and… more
    NVIDIA (11/20/25)
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