• Senior ASIC Verification Engineer

    NVIDIA (Austin, TX)
    NVIDIA is looking for a Senior ASIC Verification Engineer to help verify our global IP! This position offers an opportunity to impact an array of products while ... verification experience + Experience in pre-silicon verification (UVM, SystemVerilog), ASIC design/ implementation flow, and design automation + Programming… more
    NVIDIA (10/16/25)
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  • Senior ASIC Timing Engineer

    NVIDIA (Westford, MA)
    …power, and area targets. + Help in driving frontend and backend implementation from RTL to gds2, including synthesis , equivalence checking, floor-planning, ... human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking Silicon engineering… more
    NVIDIA (11/12/25)
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  • ASIC Engineer , Design

    Meta (Sunnyvale, CA)
    …as machine learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...in test plan development and debug 4. Collaboration with implementation team to close the design on timing and… more
    Meta (10/30/25)
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  • ASIC Physical Design and Timing…

    NVIDIA (Santa Clara, CA)
    …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... full chip level. + Help in driving frontend and backend implementation including synthesis , equivalence checking, floor-planning, timing constraints, timing… more
    NVIDIA (10/17/25)
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  • ASIC Design Engineer

    Meta (Sunnyvale, CA)
    …click "Apply to Job" online on this web page. **Required Skills:** ASIC Design Engineer Responsibilities: 1. Responsible for micro-architecture development. 2. ... using Verilog, System Verilog and/or HLS. 3. Responsible for Lint, CDC, Synthesis , & Power Optimization. 4. Collaborate with verification and emulation teams in… more
    Meta (11/14/25)
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  • Senior ASIC Physical Design Engineer

    NVIDIA (Santa Clara, CA)
    …design of CPU on-chip interconnect network and last-level caches, working on implementation , synthesis and timing closure while collaborating closely with the ... high-performance semiconductor designs. + Physical design expertise including hands-on synthesis experience, timing analysis, floor-planning and in-depth knowledge of… more
    NVIDIA (11/20/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Austin, TX)
    Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering ... we need to see: + BS or equivalent experience in Electrical Engineering, Computer Engineer , or related degree required, advanced degrees (MS, PhD) a plus + 3+ years… more
    NVIDIA (11/21/25)
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  • Senior ASIC Design Engineer - DFX

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... Team, you will play a critical role in shaping the architecture, design, implementation , and verification of DFT IPs for our next-generation SoC products. You'll… more
    NVIDIA (10/25/25)
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  • Lead ASIC Design Engineer , Amazon…

    Amazon (Austin, TX)
    …Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic ... impact of DFT on the blocks . Perform initial synthesis & timing analysis . Assist verification team in...of digital design experience, preferably in SoC design and implementation - Fixed point RTL design - Filter design… more
    Amazon (09/26/25)
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  • ASIC Design Engineer , Amazon Leo

    Amazon (Austin, TX)
    …Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic ... impact of DFT on the blocks . Perform initial synthesis & timing analysis . Assist verification team in...of digital design experience, preferably in SoC design and implementation Preferred Qualifications - 2+ years of full software… more
    Amazon (09/10/25)
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