- SpaceX (Hawthorne, CA)
- RFIC Design Engineer (Starshield) Hawthorne, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally ... with the ultimate goal of enabling human life on Mars. RFIC DESIGN ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch capability to… more
- Silvus Technologies (Irvine, CA)
- …a fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of...skill. + Experience with communication systems on FPGA or ASIC designs. **COMPENSATION** _The pay range is NOT a… more
- Microsoft Corporation (Mountain View, CA)
- …program you will be interacting with various teams, including architecture, verification, and physical design , ensuring that the design is implemented and ... engineers to help achieve that mission. We are looking for a **Senior Design Engineer** to work in the dynamic Microsoft Artificial Intelligence System on Chip… more
- Silvus Technologies (Irvine, CA)
- …+ Experience using MATLAB. + Experience with communication systems on FPGA or ASIC designs. WORKING CONDITIONS & PHYSICAL REQUIREMENTS + Office environment. + ... to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Senior FPGA/RTL Design Engineer_** who will report to the _Director of FPGA Engineering_ on the… more
- GE Aerospace (Clearwater, FL)
- …lifecycle of an FPGA in the Xilinx, Microsemi and other product families. + Design FPGA, ASIC and CPLD devices for avionics hardware applications, including ... In this role, you will utilize your experience or expertise to develop design solutions for difficult project problems, develop and execute project plans for… more
- NVIDIA (Santa Clara, CA)
- …+ Domain & Technical Expertise: Deep knowledge in EDA/VLSI (eg, synthesis, physical design , verification, timing, reliability, or CAD algorithms) combined with ... methods. + Apply deep learning and GPU computing to improve ASIC and VLSI design tool flows. + Collaborate cross-functionally with circuit design ,… more
- NVIDIA (Santa Clara, CA)
- …intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design Engineer! ... high-speed mixed-signal circuit designs. What you'll be doing: + Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog… more
- NVIDIA (Santa Clara, CA)
- …is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer? If yes, We would love to hear from you! We are looking for a ... Senior Mask Layout Design Engineer, someone who is excited to join a...mixed-signal circuit designs. What you'll be doing: + Performing physical layout for mixed-signal functions like PLL's, high speed… more
- Broadcom (Broomfield, CO)
- …+ Hands on experience with timing analysis and place and route tools for ASIC / SoC Design is a must. **Additional Requirements:** + Good problem solver. ... Sign-In before you apply.** **Job Description:** **Responsibilities Include:** + Work on Design Implementation activities related to place and route and/ or timing… more
- SanDisk (Milpitas, CA)
- …requirements to various functions of Memory teams to meet systems specs. + Define ASIC requirements for upcoming new NAND Flash based chips and design systems ... of working experience in NAND flash-based systems or relevant systems design + Previous experience in leading the product/project (Stakeholder leadership experience)… more