- The Boeing Company (El Segundo, CA)
- …Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Verification Engineer on the Boeing Electronic Products team you ... with other electronics groups across the company and around the world and support ASIC /FPGA design and verification for electronics that we build in El Segundo… more
- Cisco (San Jose, CA)
- **Sr. ASIC Engineer ** The application window is...refining design and timing constraints for seamless physical design closure. As part of this ... provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco... team who oversees fullchip SDCs and works with physical design and DFT teams to close… more
- Cisco (Maynard, MA)
- …back to a company culture that empowers an inclusive future for all. **Your Impact** The ASIC Design Verification Intern Engineer will be a member of a team ... within the engineering community to add value to the ASIC projects. This engineer must be a...Timely execution of test plans + Assistwith chip level design tradeoffs by working with design engineers… more
- Teradyne (North Reading, MA)
- …better business results. Opportunity Overview Our Hardware Engineering team is seeking an FPGA/ ASIC Design Engineer to work with a multi-disciplined team ... protocols + Use of digital simulation tools to verify designs. + Creation of physical design constraints for placement, timing closure and CDC + Implementation… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , EDA Infrastructure Responsibilities: 1. Front End implementation flow ... development and support 2. Physical Design implementation flow development and support...tools development and automation to help improve productivity across ASIC design cycles including but not limited… more
- Meta (Sunnyvale, CA)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Power Responsibilities: 1. Develop power vectors for estimation and ... optimization strategies for all layers of abstraction in silicon design , from architecture to physical design...code using Verilog/SystemVerilog or VHDL 16. Mathematical modeling of ASIC physical feature phenomenon 17. Frontend power… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... doing: + Be an integral part of the System ASIC Design team to help with the...CHI + Familiar with OCP secure boot specification and physical security handling process + Possess design … more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior ASIC Design Engineer to join our Switch Silicon team. As a Design Engineer at NVIDIA, you'll join a group of hardworking ... . + Collaborate with architects, verification engineers, formal engineers, physical design engineers, and software engineers to...high bandwidth data paths. + A deep understanding of ASIC design flows including RTL design… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate...DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation,… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for an outstanding ASIC engineer to join the team. The Team is responsible for crafting all aspects ... implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate...DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation,… more