• ASIC Engineer, Physical

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization. We are looking for individuals with experience in backend ... (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer, Physical Design Responsibilities:...cross-functional teams, IP, and EDA vendors 11. Experience in physical design and timing closure… more
    Meta (12/20/25)
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  • Senior ASIC Physical Design

    Cisco (Maynard, MA)
    …or Electrical Engineering and 4+ years of related experience * Hands-on experience in ASIC physical design and implementation * Experience with place & ... ASIC team can provide. Your Impact As a Physical Design Engineer, you will play a...advanced semiconductor nodes. You will optimize floor planning and timing , analyze and improve backend design flows,… more
    Cisco (12/21/25)
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  • Physical Verification Engineer…

    ManpowerGroup (Phoenix, AZ)
    **Job Title: Physical Verification Engineer ( ASIC Design )** **Location: USA & Canada (Remote is OK, Phoenix or Ottawa preferred)** **Role Overview** As a ** ... Engineer** , you will be responsible for ensuring that ASIC layouts meet all foundry design rules...and compliance with foundry specifications. Working closely with layout, physical design , and CAD teams, you'll help… more
    ManpowerGroup (11/14/25)
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  • ASIC Digital Design Engineer

    Teledyne (Goleta, CA)
    …Responsibilities:** + Flow down and documentation of customer requirements + Perform digital design , timing design , and detailed digital simulations + ... on a team that wins. **Job Description** **Job Summary:** ASIC Digital Design Engineer: Oversees definition, ...+ Clock/Power optimization for low-power ASICs. + Perform Back-End Physical Design as needed + Floorplanning and… more
    Teledyne (11/21/25)
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  • Principal ASIC Design Engineer…

    SpaceX (Redmond, WA)
    Principal ASIC Design Engineer (Silicon Engineering) Redmond, WA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... ultimate goal of enabling human life on Mars. PRINCIPAL ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX...timing constraints for those IPs and support the physical implementation team (synthesis, timing closure, formality… more
    SpaceX (01/01/26)
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  • Senior ASIC Engineer - SDC

    Cisco (San Jose, CA)
    …teams to understand chip architecture and guide them in refining design and timing constraints for seamless physical design closure. As part of this ... provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco...oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing more
    Cisco (12/03/25)
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  • Sr. SOC/ ASIC Physical Design

    SpaceX (Sunnyvale, CA)
    Sr. SOC/ ASIC Physical Design Methodology/CAD Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN METHODOLOGY/CAD ENGINEER (SILICON ENGINEERING) At SpaceX… more
    SpaceX (01/04/26)
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  • Senior ASIC Physical Design

    Google (Sunnyvale, CA)
    Senior ASIC Physical Design Engineer...Experience working with external partners on Physical Design (PD) closure. + Experience in Static Timing ... including key stages like floorplanning, place and route, and timing closure). + Experience in Python, Tcl, or Perl...architecture and its integration within AI/ML-driven systems. As an ASIC Physical Design Engineer, you… more
    Google (12/18/25)
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  • Senior ASIC Physical Design

    NVIDIA (Santa Clara, CA)
    …to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer, Netlisting to join our dynamic and ... logic synthesis, netlist quality checks, etc. + Help in all aspects of physical design , such as driving timing convergence, timing constraints generation… more
    NVIDIA (10/22/25)
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  • ASIC /FPGA Design Engineer (Compute…

    Teradyne (North Reading, MA)
    …interface protocols + Use of digital simulation tools to verify designs. + Creation of physical design constraints for placement, timing closure and CDC + ... Opportunity Overview Our Hardware Engineering team is seeking an FPGA/ ASIC Design Engineer to work with a...such as Python, TCL and Perl + Experience with physical design tools from FPGA vendors (Vivado… more
    Teradyne (11/25/25)
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