- SpaceX (Sunnyvale, CA)
- …with chip architects, ASIC engineers, package engineers and block level physical design engineers to drive, chip floorplan reviews and identify area, ... constraint pushdown to partition owners + Work with static timing analysis, physical verification, electromigration/voltage drop, noise...computer engineering or computer science + 5+ years of ASIC and/or physical design flow… more
- Amazon (Austin, TX)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new ... pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification,...MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from -… more
- NVIDIA (Santa Clara, CA)
- …modes to improve closure predictability. + Collaborate with CAD, physical design , and methodology engineers on timing sign-off strategies and best practices. ... Applied Agentic AI. + Coursework or academic knowledge in VLSI/ ASIC design , digital circuits, or computer architecture....+ Academic projects, research, or internships related to VLSI, physical design , STA, or EDA tools. +… more
- Broadcom (Fort Collins, CO)
- …logic, and digital circuit fundamentals. + Familiarity with ASIC physical design concepts such as placement, routing, and timing . + Strong analytical and ... industry-leading silicon solutions. **Key Responsibilities** + Contribute to the physical design implementation of large-scale ASICs (multi-hundred-million gate… more
- Broadcom (San Jose, CA)
- …from concept to product release, becoming a key contributor to all aspects of physical ASIC design . **Job Duties and Responsibilities may include:** + ... major segment of the semiconductor industry-including AI-to build advanced ASIC solutions. Join the Design Implementation team...power, area, and performance + Addressing challenges related to timing closure, and signal integrity + Working on … more
- Broadcom (Fort Collins, CO)
- …Skills / Background** + Strong foundation in VLSI design principles and ASIC physical design fundamentals. + In-depth experience with floorplanning, die ... apply.** **Job Description:** Be part of the Custom Silicon Design Team within Broadcom's ASIC Products Division...Ruby is preferred. + Experience with Cadence or equivalent physical design tools is highly desirable. **Collaboration… more
- Broadcom (Fort Collins, CO)
- …Have an understanding of the ASIC design flow including FET design , RTL, synthesis, timing , floorplanning, power planning, P&R, LVS, DRC, + Basic ... PHYs. + Work with multiple cross functional teams--analog design , digital design , physical composition, DFT, timing , and customers--to build PHYs… more
- Renesas (Duluth, GA)
- …writing device-level or sub-system specifications. + **Fluent in Verilog RTL coding and ASIC design methodology** + Expertise in digital design ... , architecture, and verification reviews + Oversee digital backend design , including synthesis, static timing analysis, and...ATE support (a plus) + Experience in DFT or physical design (a plus) Company Description Renesas… more
- Broadcom (Broomfield, CO)
- …+ Hands on experience with timing analysis and place and route tools for ASIC / SoC Design is a must. **Additional Requirements:** + Good problem solver. + ... timing closure - floor-planning, partitioning, placement, clock tree synthesis, route, timing analysis, timing closure, physical verification (LVS/DRC). +… more
- Cisco (Maynard, MA)
- …and Synplify(R) synthesis tools for FPGAs * Expertise in creating FPGA implementations from ASIC RTL code * Expertise in digital design of standard cell ASICs ... manufacturing teams. **Your Impact** You are a high-energy FGPA Design engineer who loves to work on complex communications...Development and Automation * Contribute to FPGA Emulation of ASIC Blocks * Contribute to our custom ASIC… more