• Design Engineer - Chip Floorplanner

    Broadcom (Fort Collins, CO)
    …Sign-In before you apply.** **Job Description:** Be part of the Custom Silicon Design Team within Broadcom's ASIC Products Division in beautiful Fort Collins, ... advanced process technologies. **Technical Skills / Background** + Strong foundation in VLSI design principles and ASIC physical design fundamentals. +… more
    Broadcom (11/12/25)
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  • Design Verification Engineer

    Broadcom (San Jose, CA)
    RTL verification methodologies including System Verilog. + Strong experience in ASIC design verification flows and DV methodologies + Strong working ... a Candidate Account, please Sign-In before you apply.** **Job Description:** The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and… more
    Broadcom (11/20/25)
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  • Senior Design for Debug Architect…

    NVIDIA (Santa Clara, CA)
    …integrated logic analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design , verification, ... looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement hardware and software solutions to… more
    NVIDIA (12/10/25)
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  • R&D Engineer IC Design 3

    Broadcom (Irvine, CA)
    …apply.** **Job Description:** + This opening work on chip design which enables 10Gbps/40Gbps/100Gbps/400Gbps backplane/cable/optical fiber communication and 5G ... transciever + prepare detailed design document + HDL coding, equivalency checking, STA result...equivalency checking, STA result review, CDC checks, Lint checks, RTL /gate level simulations & silicon debugging + scripting for… more
    Broadcom (12/03/25)
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  • Digital Design Engineer

    Meta (San Diego, CA)
    **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital ... our industry leading virtual and augmented reality systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block… more
    Meta (10/30/25)
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  • Chip Integration Engineer

    Broadcom (San Jose, CA)
    …be responsible for various key tasks in the areas of chip integration and RTL design of cutting-edge network switch/routing designs. The day-to-day tasks for ... and working on initial floor plan. 5). Develop Verilog RTL . design verification support, logic synthesis, physical...standing. 2). Must have in-depth knowledge of IC technology, ASIC design flows, EDA tools and Physical… more
    Broadcom (11/19/25)
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  • Senior FPGA Design Engineer

    Silvus Technologies (Irvine, CA)
    …a fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
    Silvus Technologies (11/17/25)
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  • Physical Design Methodology Engineer

    Amazon (Cupertino, CA)
    …learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server ... project tracking and visualizing QoR/stats - Interface directly with RTL , Physical Design , Package Design ,...in TCL, Perl, and/or Python - Solid understanding of ASIC physical design , physical design more
    Amazon (12/02/25)
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  • Senior Software Engineer , Hardware Tools…

    NVIDIA (Santa Clara, CA)
    …+ Strong coding skills in C+ + + Good understanding of ASIC Design and understanding of Verilog RTL + Strong interpersonal and collaboration skills. Ways ... a dedicated and motivated Software developer with particular interest in algorithms and RTL Design . Understanding both Software and Hardware principles will be a… more
    NVIDIA (10/11/25)
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  • Lead Applications Engineer - DDR…

    Cadence Design Systems, Inc. (San Jose, CA)
    …GDDR6 . Experience with simulation and synthesis tools . Strong knowledge of ASIC flow, RTL /Verilog . Individual leadership and initiative to manage pre-sales ... Join the High-Performance Culture at Cadence. As a Lead Technical Presales Engineer , you will use your knowledge of different memory interface standards to… more
    Cadence Design Systems, Inc. (10/04/25)
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