• Senior ASIC Verification Engineer

    NVIDIA (Santa Clara, CA)
    …experience) + 5+ years of verification experience + Exposure to Computer Architecture, ASIC design and verification methodology is required + Strong ability with ... NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world's leading...working across many NVIDIA teams from software, to architecture, design , methodology, and more. The GPU is used in… more
    NVIDIA (10/10/25)
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  • Senior ASIC Verification Engineer

    NVIDIA (Westford, MA)
    …the next era of AI computing. What You'll Be Doing: + Drive the verification of ASIC design and architecture for NVLink HSIO controllers at the IP and sub-system ... NVIDIA is seeking a highly motivated Senior Design Verification Engineer to play a...test plans, and building the infrastructure required to ensure design correctness. + Work closely with architects, RTL more
    NVIDIA (09/12/25)
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  • ASIC Physical Design Engineer

    Amazon (Austin, TX)
    …analysis, and physical verification * Write Tcl or PERL scripts to improve physical design flows and methods * Collaborate with RTL , DFT designers to ensure ... Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but...while also being deeply important to our customers. We design and build every component of our hardware and… more
    Amazon (09/16/25)
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  • Sr. CAD Engineer , ASIC

    Amazon (San Diego, CA)
    …silicon processes - Develop, regress, and deploy digital front end flows including RTL static checks and design verification methodology - Develop, regress and ... Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible for installing and maintaining...years of silicon digital EDA flow development and/or digital design experience - Familiar with digital RTL more
    Amazon (09/05/25)
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  • Senior ASIC Design Engineer

    Amazon (San Diego, CA)
    …wireless system architecture in silicon from system specification to chip specification to RTL to optimizing timing / power to chip level validation . Develop ... field, or equivalent experience . 7+ years in digital design , preferably in communication systems . Experience with products...gone to volume production . Experience in low power design techniques Preferred Qualifications . Master's or Ph.D degree… more
    Amazon (10/08/25)
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  • Senior ASIC Timing Engineer

    NVIDIA (Westford, MA)
    …amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking Silicon ... you will be doing: + You will drive physical design and timing of high-frequency and low-power DPUs and...+ Help in driving frontend and backend implementation from RTL to gds2, including synthesis, equivalence checking, floor-planning, timing… more
    NVIDIA (08/13/25)
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  • Digital IC Design Engineer

    Medtronic (Mounds View, MN)
    …the Life** We have a great opportunity for an experienced ASIC / FPGA Digital Design Engineer with RTL experience in Verilog or VHDL - System Verilog ... the next IC iteration + Modify or develop new RTL files using System Verilog + Develop block level...growth and cross-functional collaboration as we work together to engineer the extraordinary. This role will require less than… more
    Medtronic (10/14/25)
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  • Staff Lead Design Verification…

    Northrop Grumman (Annapolis Junction, MD)
    …Languages: (Verilog, VHDL, SystemVerilog) + Extensive knowledge of: (comprehensive RTL design methodologies, Behavioral simulation techniques, Code coverage ... & Test (SEIT) department is seeking a Staff Lead Design Verification Engineer to join our team.... We are seeking an exceptional Senior Functional Verification Engineer specializing in ASIC and FPGA technologies.… more
    Northrop Grumman (10/16/25)
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  • Digital Design Engineer

    Meta (Redmond, WA)
    Design Engineer Responsibilities: 1. Contribute to microarchitectural feature definition, RTL design , design verification and project planning 2. ... **Summary:** We are looking for a Digital Design Engineer to support our Reality...and ASIC architecture 10. Skilled in micro-architecture, RTL coding, design verification and SoC Integration… more
    Meta (10/05/25)
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  • Hardware FPGA Design Engineer

    Cisco (Maynard, MA)
    …synthesis tools for FPGAs** + **Expertise in creating FPGA implementations from ASIC RTL code** + **Expertise in digital design of standard cell ASICs** + ... Hardware FPGA Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1444830) + Location:Maynard,... ASIC Blocks** + **Contribute to our custom ASIC RTL code** **Minimum Qualifications:** + **Bachelors… more
    Cisco (09/24/25)
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