- Meta (Sunnyvale, CA)
- …apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Design Engineer Responsibilities: 1. Responsible for micro-architecture ... development. 2. Perform RTL development using Verilog, System Verilog and/or HLS. 3....debugging. 5. Collaborate with implementation team to close the design on timing and power. **Minimum Qualifications:** Minimum Qualifications:… more
- RTX Corporation (El Segundo, CA)
- …and ASIC / FPGA digital architecture + Implement ASIC / FPGA digital design using RTL + Support verification and system integration of ASIC / FPGA ... security clearance is required prior to start date + RTL coding and simulation in VHDL, Verilog, or SystemVerilog...digital lab equipment **Qualifications We Prefer:** + Experience using ASIC and/or FPGA design tools (eg Modelsim,… more
- SpaceX (Sunnyvale, CA)
- …in scan insertion or DFT setup PREFERRED SKILLS AND EXPERIENCE: + Understanding of ASIC design flow, methodologies, physical design , and verification + ... ASIC /SOC DFT Engineer (Silicon Engineering) Sunnyvale,...of the Starlink network. RESPONSIBILITIES: + Responsible for evaluating design readiness for scan insertion through RTL … more
- BAE Systems (Huntsville, AL)
- …Other incentives may be available based on position level and/or job specifics. **Senior Engineer - FPGA/ ASIC Design (Hybrid)** **117732BR** EEO Career Site ... for Department of Defense (DoD) applications. As a Senior Design Engineer , you will have the opportunity...Plan, architect, develop, and deploy complex FPGA-based designs using RTL languages such as VHDL and Verilog + Collaborate… more
- Meta (Menlo Park, CA)
- **Summary:** As a Networking ASIC Engineer on the Infrastructure Silicon team at Meta, you will play a key role in shaping the networking architecture for ... with cross-functional teams working on data center networking architecture, network system design , micro-architecture, RTL design , Design Verification,… more
- Cisco (San Jose, CA)
- …of a smaller, startup-style team. You'll collaborate with exceptional talent with deep ASIC design and development expertise. As part of a systems company, ... first customer shipments. **Your Impact** You are a diligent Design /SDC Engineer with strong analytical skills and...timing modes. + Option to also do block level RTL design or block or top-level IP… more
- Northrop Grumman (Linthicum Heights, MD)
- …and Responsibilities:** + Responsible for DFT ( Design for Testabilty) aspects of ASIC Design thorough understanding of digital design concepts + ... development process. + Knowledgeable in VHDL, Verilog or SystemVerilog RTL coding and be highly proficient in DFT methodologies....hired + Experience in full product life cycle of ASIC Design + Experience with Cadence and/or… more
- NVIDIA (Santa Clara, CA)
- … design is preferred. + Verilog expertise is preferred as is a deep understanding of ASIC design flow including RTL design and verification, DFT, and ... As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical... Team, you will be responsible for the physical design of CPU on-chip interconnect network and last-level caches,… more
- NVIDIA (Austin, TX)
- …design verification experience + Experience in pre-silicon verification (UVM, SystemVerilog), ASIC design /implementation flow, and design automation + ... NVIDIA is looking for a Senior ASIC Verification Engineer to help verify...an array of products while collaborating with teams from design , architecture, verification, and integration. At NVIDIA, we have… more
- Google (Sunnyvale, CA)
- Senior ASIC Power Engineer , ML Accelerators _corporate_fare_... design , digital ASIC , or SoC design . + Experience with RTL (Register Transfer ... using Verilog or SystemVerilog. + Experience with low-power design or power reduction methodologies/techniques. **Preferred qualifications:** + Master's degree… more