• Design Verification Engineer

    ManpowerGroup (Santa Clara, CA)
    …Verilog, System Verilog, and modern verification libraries like UVM. + 10+ years of ASIC design verification experience. + Experience or background with DDR or ... a leader in the technology industry, is seeking a Design Verification Engineer to join their team....failures to determine the root cause, and collaborate with RTL and firmware engineers to resolve design more
    ManpowerGroup (09/27/25)
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  • Physical Design Methodology Engineer

    Amazon (Austin, TX)
    …learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server ... project tracking and visualizing QoR/stats - Interface directly with RTL , Physical Design , Package Design ,...in TCL, Perl, and/or Python - Solid understanding of ASIC physical design , physical design more
    Amazon (09/02/25)
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  • Senior Software Engineer , Hardware Tools…

    NVIDIA (Santa Clara, CA)
    …+ Strong coding skills in C+ + + Good understanding of ASIC Design and understanding of Verilog RTL + Strong interpersonal and collaboration skills. Ways ... a dedicated and motivated Software developer with particular interest in algorithms and RTL Design . Understanding both Software and Hardware principles will be a… more
    NVIDIA (10/11/25)
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  • Lead Applications Engineer - DDR…

    Cadence Design Systems, Inc. (San Jose, CA)
    …GDDR6 . Experience with simulation and synthesis tools . Strong knowledge of ASIC flow, RTL /Verilog . Individual leadership and initiative to manage pre-sales ... Join the High-Performance Culture at Cadence. As a Lead Technical Presales Engineer , you will use your knowledge of different memory interface standards to… more
    Cadence Design Systems, Inc. (10/04/25)
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  • Sr. DSP and Wireless Systems Engineer

    Amazon (Redmond, WA)
    …solutions. You will work closely with internal inter-disciplinary teams such as ASIC /RFIC designers, FW/SW engineers, design verification engineers. You will ... The Role: As a Sr. DSP and Wireless Systems Engineer working in the Digital RF Systems team, you...WiFi 802.11, BLE) . In depth knowledge of DSP design for low power consumption ASIC .… more
    Amazon (09/27/25)
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  • Senior Architecture Energy Modeling…

    NVIDIA (Santa Clara, CA)
    …Power Modeling, Methodology and Analysis Team, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software ... are now looking for an Sr. Architecture Energy Modeling Engineer ! At NVIDIA, we pride ourselves in having energy-efficient...in energy-efficient GPU designs. + Familiarity with Verilog and ASIC design principles is a plus. +… more
    NVIDIA (09/05/25)
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  • Senior Principal Electrical Engineer - A2G…

    RTX Corporation (Cedar Rapids, IA)
    …activities. + Requirements capture, decomposition, and traceability. + ASIC digital design and/or verification. + RTL coding and simulation in VHDL, Verilog, ... The Computing Solutions Department is looking for a Senior Principal Electrical Engineer for development of the next generation product line solutions in Cedar… more
    RTX Corporation (10/01/25)
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  • FPGA Engineer , Platforms, Hardware

    Google (Sunnyvale, CA)
    …related field, or equivalent practical experience. + 4 years of experience working in an ASIC or FPGA design technical environment, or 3 years of experience with ... FPGA Engineer , Platforms, Hardware _corporate_fare_ Google _place_ Sunnyvale, CA,...an advanced degree. + Experience with Register-Transfer Level design using Verilog or SystemVerilog. + Experience in the… more
    Google (09/28/25)
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  • Senior Synthesis Flow CAD Engineer

    NVIDIA (Santa Clara, CA)
    …with 3+ years of CAD experience; MS preferred + Be familiar with Verilog and ASIC design along with experience in commercial EDA tools + Software engineering ... implementation and analysis tools + Provide support for ASIC tools and flows + Assist chip design...Familiarity with Machine Learning/Deep Learning + Experience in other ASIC methodologies such as RTL Lint, CDC,… more
    NVIDIA (09/09/25)
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  • Principal Product Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …be a highly motivated, optimistic, and energetic engineer with a good appreciation of ASIC design methodologies from RTL to GDSII with a strong history ... technology. This opportunity is for an engagement focused Product Engineer (PE) in the Digital and Signoff Group (DSG)...PPA tuning and Layout experience, having experience of either RTL design and/or associated tool knowledge is… more
    Cadence Design Systems, Inc. (09/09/25)
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