- Palo Alto Networks (Santa Clara, CA)
- …and the kind of precision that drives great outcomes. **Your Career** As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in ... experience required - MSEE preferred + Minimum 5 years experience in ASIC design verification + Demonstrated success in taking multiple ASIC products from… more
- BAE Systems (Cedar Rapids, IA)
- …their precision navigation missions. BAE is looking for experienced senior level ASIC /FPGA Design Verification Engineers who can plan, architect, and develop ... testbenches in SystemVerilog/UVM, OVM, and/or VHDL + Experience with ASIC /FPGA design and verification tools (eg Siemens or Cadence) + Proven track record… more
- Google (Sunnyvale, CA)
- ASIC Design Verification Engineer, University Graduate _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Early** Experience completing work as directed, and ... and post silicon bring-up. + Experience with the full verification life cycle. + Familiarity with ASIC ...full verification life cycle. + Familiarity with ASIC standard interfaces. **About the job** In this role,… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and...IPs, create functional test plans, and verify using advanced verification tools, flows and methodologies. + Build and reform… more
- Lockheed Martin (Highlands Ranch, CO)
- **Description:** Join Our Team as a ** ASIC /FPGA Verification Engineer** where you will work on the development of a sophisticated state\-of\-the\-art avionics ... be effective in this role, you will need:** * Experience in verification of FPGA and ASIC devices * 12\+ years of professional experience\. * Willing and able… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer, SoC Verification Responsibilities: 1. Define and implement… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer, Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer, Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Formal ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer, Formal Verification Responsibilities: 1. Provide technical… more
- Northrop Grumman (Jessup, MD)
- …Experience in HDL (VHDL/Verilog) and HVL (SystemVerilog) + Experience with FPGA or ASIC + Knowledge of Universal Verification Methodology (UVM) + Experience with ... (VHDL/Verilog) and HVL (SystemVerilog) + Experience with FPGA or ASIC + Knowledge of Universal Verification Methodology...FPGA or ASIC + Knowledge of Universal Verification Methodology (UVM) + Experience with scripting languages (Bash,… more
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