- Global Foundries (Richardson, TX)
- …to network with executives. Summary of Role: Seeking a SoC Design Verification Intern to verify the High-Performance Data Processing Unit Chiplets and Automotive ... be responsible for contributing to all phases of the verification lifecycle, including reviewing specifications, developing testbench architecture, creating… more
- Amazon (Austin, TX)
- …and Japan, and customers across all industries. We are seeking experienced Design Verification Engineers to build the next generation of our cloud server chips. Our ... Degree or Higher in EE or CS or CE. - 8+ years of design verification experience using System Verilog and UVM - 8+ YOE in testbench development including: stimulus,… more
- Amazon (Cupertino, CA)
- …solutions achieve their desired functionality, developing and executing multi-faceted verification /validation plans, and measuring the teams progress towards our ... Engineering, Electrical Engineering, or other related discipline - 3+ years of design verification experience using System Verilog and UVM - 3+ years of experience… more
- Trane Technologies (Minneapolis, MN)
- …you will do:** ** ** Thermo King has an opportunity for a Verification & Validation Engineering Intern, which provides current college students with challenging ... to a variety of assignments which could include: New Product Development, verification & validation, quality engineering, product design, test, and analysis. In this… more
- Teradyne (North Reading, MA)
- …innovation and delivers better business results. Opportunity Overview The Hardware Verification Team within the Integrated Systems Test Group is responsible for ... for a motivated, energetic, and eager to learn hardware verification /test engineer to join us in a fast paced,...is eligible for discretionary bonus(es) based on financial performance. Benefits : Teradyne offers a variety of robust health and… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. Join us today! We are now looking for a Senior System Verification Engineer to join our Emulation division and will be working onsite from our ... of CPU - GPU coherency + Experience with UVM verification environments and scripting with Perl, Python and C/C++...5. You will also be eligible for equity and benefits (https://www.nvidia.com/en-us/ benefits /) . Applications for this job… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Verification Engineer to join our Emulation division. We are a worldwide recognized division noted for groundbreaking technology. We are ... proficient in Verilog and/or VHDL, C/C++ and SystemVerilog. + Experience with UVM verification environments and scripting with Perl, Python and C/C++ is essential. +… more
- Caris Life Sciences (Irving, TX)
- …Caris is where your impact begins.** **Position Summary** Our Verification / Authorization Associates are responsible for verifying active insurance coverage, ... + Review all patient insurance information needed to complete coverage verification . + Verifies insurance eligibility to ensure claims are billed accurately… more
- SpaceX (Sunnyvale, CA)
- …willing to work extended hours and weekends as needed COMPENSATION AND BENEFITS : Pay range: Design Verification Engineer/Level I: $130,000.00 - $155,000.00/per ... RTL and physical design Scan Design Rule Check (DRC) tools + Integration and verification of Design for Test (DFT) fabrics and IP within Subsystems + Running and… more
- Penn Medicine (Lawrenceville, NJ)
- …life's work? **Summary:** + Under general supervision, the Insurance Verification Analyst is responsible for obtaining insurance pre-certification. Responsible to ... includes but is not limited to verifying eligibility, obtaining benefits , ensuring referrals, pre-determination and/or authorization requirements have been… more