- LinkedIn (Mountain View, CA)
- …Contribute to LinkedIn's liquid-cooling deployment strategy, assessing various direct-to- chip cooling technologies, comparing performance tradeoffs and operational ... such as phase imbalance, protection coordination, thermal irregularities, and liquid-to- chip cooling system failures. Basic Qualifications: + Bachelor's Degree in… more
- ManpowerGroup (Phoenix, AZ)
- …SoC and ASIC designs. **Key Responsibilities** + Perform **physical verification** of full- chip and block-level layouts, including: + **DRC (Design Rule Check)** + ... Python, or Perl** scripting. + Validate **hierarchical verification flows** ( chip -level and block-level integration). + Ensure compliance with **electromigration… more
- NVIDIA (Westford, MA)
- …and low-power DPUs and SoCs at block level, cluster level, and/or full chip level. + Analyze and optimize design constraints and synthesis parameters to achieve ... tools like Synopsys PrimeTime or Cadence Tempus. + Solid experience in full- chip /sub- chip Static Timing Analysis (STA), timing constraints generation and… more
- Broadcom (San Jose, CA)
- …make an impact! **Key Responsibilities** + Conduct detailed studies of chip architecture and micro-architecture to define, develop, and execute comprehensive ... architecture, and micro-architecture using emulation platforms. + Develop sub-system and chip -level tests using Tcl, ITcl, Python, and C/C++ to verify networking… more
- Amazon (Pasadena, CA)
- …with experience in semiconductor process development - and in particular wirebonding, flip chip bonding, dicing - who will aid in AWS's effort to bring cloud ... skills. Successful candidates will have experience in dicing, wire-bonding, flip chip bonding techniques and tools. Working effectively within a team environment… more
- Johns Hopkins University (Gaithersburg, MD)
- …including data collection on state-of-the-art of the microchip manufacturing process and chip product value chain. - Develop a strong understanding of the microchip ... market including the strengths and limitations of US chip -making. - Develop high fidelity simulation models (across multiple product life cycles and product value… more
- NVIDIA (Santa Clara, CA)
- …collaborates with the front design team to understand the clocking requirements for the chip . The clocks team interacts with the floor-planning and back end team to ... help craft the physical floorplan of the chip . The team explains the programming model to the...cross-talk, and OCV effects is a plus. + Implementing on- chip clocking networks is a bonus Ways to stand… more
- NVIDIA (Santa Clara, CA)
- …of EC firmware with other platform firmware + Provide technical support to the EC Chip vendors and OEMs/ODMs + Partnering with the EC Chip vendors to ensure ... proper test tools and automation for qualifying firmware. + Develop collaterals for EC chip vendors and OEMs/ODMs What we need to see: + Bachelor's Degree or higher… more
- Applied Materials (Santa Clara, CA)
- …global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service ... is the leader in materials engineering solutions to produce virtually every new chip and advanced display in the world. Our expertise in modifying materials at… more
- Amazon (Sunnyvale, CA)
- …part of Amazon Leo's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. ... Lead the timing sign-off for the post P&R database. * Ensure that the chip meets the required DFM criteria by verifying the IR/EM results. Export Control… more