- Broadcom (Fort Collins, CO)
- …through production. **Role Overview** This Floorplanning Engineer role focuses on chip -level physical architecture and integration for advanced ASICs in deep ... sub-micron technologies. The position provides hands-on experience with the latest 3 nm and smaller process nodes, defining and optimizing the overall die layout, including partitioning, hierarchy, and placement of major functional blocks, memories, and I/O… more
- Utilities Service, LLC (Durham, NC)
- …" **Foreperson** This position ensures the productivity of daily operations, working closely with management to determine recruiting/hiring needs,deadlines, and ... safety protocols to enforce among the crew. The Foreperson is responsible for troubleshooting routine job site issues and engages all employees/contractors on required training, managing, and mentoring. **Are you a real go-getter looking for an amazing… more
- ThermoFisher Scientific (Santa Clara, CA)
- …As the Senior Manager, Bioinformatics, you will manage and provide technical leadership to our genetic sciences bioinformatics team responsible for custom array ... designs for genetic analysis in research, human health, and agricultural genomics. Leading this team requires a good understanding of both population-scale studies as well as an understanding of the importance of a variety of individual markers that might be… more
- Towne Park (Michigan City, IN)
- …**Education:** + High school diploma or general education degree (GED) **Required Licensure, Certification, etc.:** + Must hold a valid driver's license for the state ... **_At Towne Park, it's more than a job, you can make an impact._** A career with us is rewarding in more ways than one. As a hospitality services company, our commitment is to create smiles by delivering exceptional experiences. When you work with us, you have… more
- Aerotek (Breinigsville, PA)
- …No previous cleanroom experience required, full training provided. **What You'll Do** + Operate manual and computer‑controlled semiconductor equipment + Set up and ... run complex machinery for wafer and optical component processing + Follow detailed procedures for photolithography, cleaning, pattern transfer, and metrology + Track production data using computer software + Maintain quality standards and identify potential… more
- Global Foundries (Malta, NY)
- …Sofia. Summary of Role: Design, develop, and utilize testsites which are in-house chip designs used to develop and understand the technology of interest. Typically ... directed and/or independently), or as a manager:* Perform in-house chip development to aid in understanding the customers design...in understanding the customers design / technology * Design chip elements to get electrical data out of the… more
- Google (Sunnyvale, CA)
- …Integrity (SI/PI) analysis and design for high-speed digital systems, including chip -package co-design concepts. + Excellent programming and data analysis skills. ... AI/ML-driven systems. As a Signal Integrity/Power Integrity Engineer, you will lead chip and package design, ensuring optimal Signal Integrity (SI) and Power… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Architect for our NVLink chip to chip team! NVIDIA is seeking an experienced technical leader passionate about defining advanced ... chip interconnects and protocols. You'll be part of a...be doing: + Researching and crafting architecture solutions for chip -to- chip communication, optimizing for performance, area, power,… more
- International Paper (Shreveport, LA)
- …You Will Perform:** Be a safety leader. Provide field level leadership of chip and fiber fuel fiber testing along with supplier analysis. Conduct technical ... inspection and evaluation on chip and fiber fuel producing equipment. Analyze, test, audit,...producing equipment. Analyze, test, audit, and perform maintenance on chip and fiber fuel quality laboratory and various sampling… more
- Google (Sunnyvale, CA)
- …related field, or equivalent practical experience. + 4 years of experience in chip package substrate design using Cadence APD (Allegro Package Designer) or mentor ... expedition. + Experience in chip package substrate layout, design verification, DFM and taping...design. + Experience in working with cross-functional teams including chip design, SI/PI, and PCB design teams. + Experience… more