- Google (Sunnyvale, CA)
- …and its integration within AI/ML-driven systems. As a System on a Chip (SoC) Physical Design Engineer, you will collaborate with Register-Transfer Level (RTL), ... Design for Testing (DFT), Floorplan, and full- chip Sign off teams. Additionally, you will solve technical problems with innovative micro-architecture and practical… more
- Global Foundries (Malta, NY)
- …placement, and thermal/mechanical integration. + Develop and implement scalable fiber-to- chip coupling strategies (eg, V-groove, passive alignment, lens integration) ... techniques. + Familiarity with packaging technologies such as die attach, flip- chip , underfill, molding, and micro-optics integration. + Understanding of reliability… more
- NVIDIA (Santa Clara, CA)
- …methodology, design, testplan and tools to efficiently enable, test and deploy new chip features. The group is muti-faceted, working across SSG and other partner ... SOL, efficient testing meeting quality benchmarks. Scope spans from datacenter to chip level. + Creating productization processes and methodologies to guide SSG… more
- Applied Materials (Santa Clara, CA)
- …global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service ... the leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world.** Our expertise in modifying materials at… more
- Global Foundries (Malta, NY)
- …electrical interconnect solutions including Copper RX, Copper uPillar , chip -on-wafer hybrid bonding and wafer-to-wafer hybrid bonding . Essential Responsibilities: ... production for d ata centers, automotive and communications + Expert in chip package interaction for 2D, 2.5D, 3D SiPh advanced packaging Preferred Qualifications:… more
- Google (Sunnyvale, CA)
- …Signal Integrity (SI) design on data center hardware products. + Collaborate with board, chip and system engineers, design partners, and chip vendors, to support ... system SI design, explore layout and manufacturability tradeoffs, and ensure that product functions as required. + Support Application-Specific Integrated Circuit (ASIC), package, board, connector, and cable vendors to develop new interconnect technologies. +… more
- Akwesasne Mohawk Casino Resort (Hogansburg, NY)
- …the fundamentals of dealing blackjack with emphasis placed on card totaling, correct chip cutting and handling techniques, identify the value of each color chip ... , card shuffling and card placement and learning to read the total value of a bet and proper pit procedures. Special attention will be given to game and accounting procedures, accuracy and speed. During this time students will also learn the fundamentals to… more
- SpaceX (Sunnyvale, CA)
- …code and functional coverage closure + Contribute towards pre-silicon verification, chip bring-up and post-silicon validation + Be a hands-on self-starter who ... + Experience with scripting languages, eg Python for automation + RTL design, chip bring-up, and post-silicon validation experience + Ability to work in a dynamic… more
- NVIDIA (Santa Clara, CA)
- …focus is on architecture and design of CMOS and Silicon-Photonics high-speed chip interfaces (NVLink, IEEE, PCIE, USB, OIF) and other complex photonic functions. ... devices for high-speed optical interconnect and sensing applications. + Conduct chip layout circuit design, circuit checking, and device evaluation and… more
- NVIDIA (Santa Clara, CA)
- …and flow network modeling tools for crafting contend facility digital twins from chip to chiller of small to large scale manufacturing facilities and DC modeling ... + Working Knowledge and design ability for data center direct-to- chip liquid cooling technologies, including using liquid-to-liquid, liquid-to-air, single phase… more