- NVIDIA (Santa Clara, CA)
- …by phenomenal technology-and outstanding people! As part of NVIDIA's applied LLM and AI chip design team, you will have the opportunity to tap into the unlimited ... potential of AI and change the landscape of chip design at NVIDIA and throughout the industry. Our...by leveraging AI technologies to solve complex problems in chip design, driving innovation and meaningful impact across the… more
- Adams County Government (Brighton, CO)
- …of the ACHD Community Health Assessment (CHA), Community Health Improvement Plan ( CHIP ), and Community Engagement (CE) Plan, ensuring shared leadership and share ... manager for the design and implementation of the department-wide CHA, CHIP , and CE Plan process, ensuring integration of evidence-based and community-informed… more
- IBM (Yorktown Heights, NY)
- …stack. * Contribute to the PyTorch backend integration for the Spyre chip . * Contribute to hardware-software co-design, working with a cross-functional team to ... optimize AI (Artificial Intelligence) workloads on the Spyre chip . * Develop various test suites and end-to-end CI/CD...on various AI model enablement on the AIU Spyre chip , including state-of-the-art models and emerging models. * Work… more
- IBM (Rochester, MN)
- …through high-speed serial channel analysis, power domain analysis, and 1st level chip packaging integration methodologies that enable hardware in IBM Mainframe and ... Additionally, members of this department partner with IBM Research on Custom Chip /Wafer Scale Integration and Quantum Cryogenic hardware development. Team members of… more
- Meta (San Diego, CA)
- …**Preferred Qualifications:** Preferred Qualifications: 10. Experience architecting or designing chip pervasive logic such as clock generation, reset, and power ... multiple clock and voltage domains for battery-operated systems 11. Experience deploying chip pervasive logic such as clock generation, reset, and power management… more
- Amazon (Austin, TX)
- …model power consumption with high accuracy. Key job responsibilities - Responsible for full chip power analysis & modelling at various stages of design (RTL to gate ... to simulations. - Work with Emulation engineers to model chip -level power consumption A day in the life Depending...design team. - Work with emulation engineers to model chip level power consumption and correlate with simulation -… more
- Northrop Grumman (Jessup, MD)
- …- either MS or PhD + Current security clearance or eligibility + Experience with chip level integration and ASIC chip lead - Strong design automation skills + ... either MS or PhD + Current security clearance + Experience with chip level integration and ASIC chip lead - Strong design automation skills + Experience in CAD… more
- Broadcom (Irvine, CA)
- …node silicon (7nm, 5nm, 3nm and beyond). This role partners closely with chip design, system design, SI/PI, thermal, and manufacturing teams to define and deliver ... Responsibilities** **Package Architecture, Co-Design & Optimization** + Collaborate with chip design and analog/digital IP/PHY teams (224G/112G SerDes, PCIe Gen… more
- Amazon (Austin, TX)
- …of the vertical stack of Silicon, PCB, High Speed components eg, HBM, PCIe and Chip to Chip , inter-systems and system to system. Diving deep into new technology ... As a Senior Validation engineer, you are responsible for validating the chip and system architecture for the next generation Machine Learning Acceleration (MLA)… more
- Broadcom (Fort Collins, CO)
- …and functional tests domains. * Qualification Support : Assist with chip testing to support qualification related testing. Examples including failure verification ... able to independently develop test programs, including complex test flows to support chip specifications around performance and power consumption * Must be able to… more