- Amazon (Cupertino, CA)
- …of the vertical stack of Silicon, PCB, High Speed components eg, HBM, PCIe and Chip to Chip , inter-systems and system to system. Diving deep into new technology ... As a Senior Validation engineer, you are responsible for validating the chip and system architecture for the next generation Machine Learning Acceleration (MLA)… more
- Microsoft Corporation (Hillsboro, OR)
- …Develop performance modeling methodologies by creating and owning System on Chip (SOC) / Intellectual Property (IP) cycle-accurate/approximate performance models and ... to the RTL implementation. + Work closely with the product architecture System On Chip (SOC) architecture teams, IP architecture, to ensure our SOC and IPs enable… more
- NVIDIA (Seattle, WA)
- …is to ensure NIC Firmware is fully verified before manufacturing the actual chip . You will work closely with advanced emulation systems. As a Firmware engineer, ... bringing up next-generation NIC devices + Collaborating closely with Chip Design, Firmware, and Software teams during integration activities...to work with a wide interface of people - chip design, verification, FW, SW Ways to stand out… more
- Cisco (Holmdel, NJ)
- …you will own the critical alignment process development of fiber array to PIC; PIC-to- Chip ; Chip -to- Chip as well as influence the equipment selection and ... process optimization for all necessary optical assembly steps. Additional responsibilities include: + Technical ownership of optical transceiver assembly process development, especially silicon photonics optical coupling and free space optics assembly using… more
- NVIDIA (Santa Clara, CA)
- …feedback. + Driving new feature initiatives across multiple business units, converting chip and board level dI/dt analysis/mitigation techniques and board PDN design ... to enable product shipment. + Work alongside system architects, chip and board designers, software/firmware engineers, HW/SW applications engineering,… more
- Amazon (Cupertino, CA)
- …the ground-up. We're looking for someone to lead our SoC (System on a Chip ) Hardware Abstraction Layer (HAL) team. You'll be responsible for directing the team both ... for higher layers of the software stack. You'll work closely with chip architects, designers, verification engineers, and fellow software engineers to shape our… more
- NVIDIA (Santa Clara, CA)
- …closure of Nvidia's GPUs, CPUs, DPUs and SoCs at block level, cluster level, and/or full chip level. + Work with PD, DFX, Clocks, and other teams in coming up with ... years' experience in Timing and STA + Hands-on experience in full- chip /sub- chip Static Timing Analysis (STA) and timing convergence, timing constraints… more
- Meta (Austin, TX)
- …block level uArchitecture definition and RTL implementation 2. Contribute to chip -level integration, verification plan development and verification 3. Define timing ... and static timing analysis 4. Support the test program development, chip validation and chip life until production maturity 5. Work with FPGA/Emulation engineers… more
- NVIDIA (Santa Clara, CA)
- …seeking a highly motivated full-stack software developer with experience in chip development workflows to build high-impact engineering tools that enhance ... productivity and streamline chip development. You will work closely with world-class hardware...effectively with cross-functional teams. + Eagerness to learn about chip hardware engineering workflows and develop domain expertise. +… more
- NVIDIA (Santa Clara, CA)
- …of experience in shaping and bringing to fruition high-performance, high-volume System-on- Chip (SoC) platforms. The ideal candidate will bring deep technical ... evaluation, trade-off assessments, and architectural modeling to identify optimal chip , package and system construction. + Lead improvements in architecture,… more
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