• RF Module Design Engineer

    Skyworks (Cedar Rapids, IA)
    …through new architectures and ideas, maintaining a competitive edge in the market . * Collaborate closely with multi-discipline teams, including module, systems, PA, ... performance. * Lead efforts in the simulation and EM analysis of filters, multi- chip modules (MCM), and integrated systems using Agilent ADS/Cadence and 2.5/3D EM… more
    Skyworks (05/08/25)
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  • SoC Systems Performance Engineer, Staff

    Qualcomm (San Diego, CA)
    …Group, Engineering Group > PPT Systems Engineering **General Summary:** Qualcomm's Chip Architecture multi-site team of systems engineers, hardware and software ... architects are driving analysis and defining next-generation architectures for our system-on- chip (SoC) products for mobile, automotive, Compute and other product… more
    Qualcomm (04/17/25)
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  • Lead Advanced Microelectronics Packaging Design…

    The Boeing Company (El Segundo, CA)
    …architecture and technology roadmap (partner with Silicon IC team to optimize chip Floorplan and bump placement). + Cross-functional interface with IC design, ... track record to drive package selection through feasibility studies and drive chip Floor planning and bump assignment. + Familiar with package design reviews… more
    The Boeing Company (05/30/25)
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  • Electrical Engineer

    Actalent (Beaverton, OR)
    …power, lighting, and distribution systems, as well as heat trace and chip manufacturing equipment installations. Prepare engineering studies for power and low ... with power, lighting, and distribution systems, as well as heat trace and chip manufacturing equipment installations. + Prepare engineering studies for power and low… more
    Actalent (05/29/25)
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  • Lead Speed and Reliability Engineer - DFP

    NVIDIA (Santa Clara, CA)
    …methodology, design, testplan and tools to efficiently enable, test and deploy new chip features. The group is muti-faceted, working across SSG and other partner ... SOL, efficient testing meeting quality benchmarks. Scope spans from datacenter to chip level. + Creating productization processes and methodologies to guide SSG… more
    NVIDIA (05/29/25)
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  • Principal Digital Engineer/Senior Principal…

    Northrop Grumman (Linthicum Heights, MD)
    …subsystems and components such as Custom Chassis, Backplanes, Single Board Computers, Multi- chip Modules, SiPs, SoCs, ASICs, and FPGAs. Perform integration and test ... Radio, EA/ESM systems, EO/IR Sensors, Sonar and Acoustic Sensors, AI & ML, Multi- chip Modules, System in a Package, Hardware Emulation, Digital Twins, High Speed… more
    Northrop Grumman (05/29/25)
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  • Senior Physical Design Engineer

    NVIDIA (Santa Clara, CA)
    …of the GPU in 1999 sparked the growth of the PC gaming market , redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep ... we will all participate in establishing physical design methodologies, flow automation, chip floorplan, power/clock distribution, chip assembly and P&R, timing… more
    NVIDIA (05/21/25)
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  • Patient Financial Counselor (Full-time)

    Billings Clinic (Billings, MT)
    …through tracking of Medicaid, SSI, SSDI, MCP, VA, Crime Victims, CHIP , liens, estates, financial assistance applications, bank loan program, and telephone ... eligibility for SSI, SSDI, Medicaid, MCP, VA, Crime Victims, CHIP , liens, estates, financial assistance program and promotion of...as a Certified Application Counselor for the Health Insurance Market Place * Identifies needs and sets goals for… more
    Billings Clinic (05/19/25)
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  • Key Account Manager - Semiconductor (East Coast)

    3M (NY)
    …in this Role As a Key Account Manager- Semiconductor for the Semiconductor market product portfolio in the Semiconductor Vertical Organization at 3M, you will have ... Planarization), TBDB (temporary bonding & De-bonding), WSS (wafer support systems), chip transport tape or materials for advanced packaging of multi- chip more
    3M (05/19/25)
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  • Sr. Research Specialist II

    Johns Hopkins University (St. Petersburg, FL)
    …including flow cytometry and next generation sequencing based technologies (ATA-seq, ChIP -Seq, CUT and RUN, GRO-Seq etc). This individual is responsible for ... + Experience with next generation sequencing based technologies (ATA_seq, RNA.Seq, ChIP -Seq) and cellular assays (flowcytometry, ELISA). + Experience with in vivo… more
    Johns Hopkins University (05/16/25)
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