- Micron Technology, Inc. (Boise, ID)
- …for designing, simulating, and optimizing DRAM circuits. You will lead layout processes, conduct verification and reliability analysis, and collaborate with critical ... within a dynamic and collaborative environment! **_Contribute to the Design and Layout of New Memory Products_** + Implement device specifications and develop… more
- Insight Global (Beaverton, OR)
- …- Technical Leadership: Provide technical leadership for complex SerDes products. - Layout Supervision: Supervise layout and conduct post- layout simulations. ... Extensive experience with and advanced knowledge of Cadence design, simulation, layout , and verification tools for analog and mixed-signal designs. - Semiconductor… more
- Sandia National Laboratories (Albuquerque, NM)
- …vary by job classification. What Your Job Will Be Like: Organization 05253, Advanced CMOS Products and Designs, is looking for an early-career Analog Mixed Signal IC ... Design Electronics Engineer to join our team focused on developing advanced CMOS chips. The chosen candidate will be responsible for developing, architecting,… more
- Micron Technology, Inc. (San Jose, CA)
- …the development of new memory products by assisting with the overall design, layout , and optimization of datapath circuits for NAND flash memory. This senior-level ... parasitics and optimize signal quality in close collaboration with layout teams + Optimize circuit design based on a...Optimize circuit design based on a comprehensive understanding of CMOS technology and reliability + Document and review final… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …with specialization in analog microelectronics . Minimum 8 years of experience in CMOS SerDes or high-speed I/O IC design and development (≥16Gb/s) and in ... . Proficiency in using CAD tools for circuit simulation, layout , and post- layout verification . Other non-requirements...d'experience dans la conception et le developpement de SERDES CMOS ou de circuits integres I/O a haute-vitesse (≥16… more
- NVIDIA (Santa Clara, CA)
- …and self-driving cars. Our teams focus is on architecture and design of CMOS high-speed chip interfaces and complex analog functions. Come join our dynamic team! ... implement high speed interfaces and complex mixed-signal circuits using state-of-the-art sub-micron CMOS technologies and various EDA tools: + High speed analog and… more
- Amazon (San Diego, CA)
- …you will be responsible for the architectural definition, design, simulation, layout , and extracted simulation for transmit and receive mixed-signal circuit blocks ... DACs & ADCs and other analog/mixed-signal blocks in deeply scaled CMOS technologies. * Explore circuit architectures for power/area/performance trade-offs. * Perform… more
- ManpowerGroup (Phoenix, AZ)
- …integrity, manufacturability, and compliance with foundry specifications. Working closely with layout , physical design, and CAD teams, you'll help deliver clean, ... layouts, including: + **DRC (Design Rule Check)** + **LVS ( Layout vs. Schematic)** + **ERC (Electrical Rule Check)** +...+ **Cadence Pegasus / Assura** + Familiarity with **advanced CMOS technology nodes** and foundry rule decks. + Understanding… more
- NVIDIA (Santa Clara, CA)
- …outstanding products. Teams are dedicated to the architecture and design of CMOS and Silicon-Photonics high-speed chip interfaces (NVLink, IEEE, PCIE, USB, OIF) and ... you will be doing: + Develop and implement physical design and layout methodologies for integrated photonic devices focused on high-speed optical interconnect and… more
- NVIDIA (Santa Clara, CA)
- …Help by defining circuit requirements and complete design from schematic, layout , and verification to characterization. + Conduct schematic design of deep-submicron ... CMOS technologies using Spectre, Hspice or like. + Take...the specifications for system performance. + Work closely with layout engineers by providing detailed floorplan and guidance for… more