- NVIDIA (Santa Clara, CA)
- …Help by defining circuit requirements and complete design from schematic, layout , and verification to characterization. + Conduct schematic design of deep-submicron ... CMOS technologies using Spectre, Hspice or like. + Take...the specifications for system performance. + Work closely with layout engineers by providing detailed floorplan and guidance for… more
- Teledyne (Goleta, CA)
- …for simulation. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Evaluates all aspects of the process ... design team, analog design, and full custom IC cell layout + IC Device Test Support: Provide assistance (as...Imaging Systems and Electro-Optical Components + Digital design for CMOS technology + Simulation tools such as SPICE +… more
- Broadcom (Irvine, CA)
- …teams of analog engineers. Draw or oversee the drawing of the custom physical layout of these circuits. Work with others to define circuit board components to be ... review and revise the chip package route with package layout engineers. Design and/or review the PC test board...Proficiency in high speed comparator design. In-depth knowledge of CMOS devices. RF design knowledge is highly desirable. Proficiency… more
- Teledyne (Camarillo, CA)
- …designing Digital Analog Mixed Signal IR ROIC designs. + Strong background with CMOS semiconductor IC design including performing full custom analog IC layout . ... Strong background with full custom circuit, block, and chip layout using Cadence Virtuoso tools, Layout L/XL, and physical verification tools such as Assura and… more
- NVIDIA (Santa Clara, CA)
- …intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of ... generation chiplet interface projects What you'll be doing: + Performing physical layout for mixed-signal functions like top level, high speed datapaths and… more
- NVIDIA (Santa Clara, CA)
- …of best-in-class products. Our teams focus is on architecture and design of CMOS and Silicon-Photonics high-speed chip interfaces (NVLink, IEEE, PCIE, USB, OIF) and ... for high-speed optical interconnect and sensing applications. + Conduct chip layout circuit design, circuit checking, and device evaluation and characterization. +… more
- Micron Technology, Inc. (Boise, ID)
- …circuits to all DRAM related projects at Micron. Use of both analog and digital CMOS design skills needed to work on the high-speed IO circuits you would be ... of at least 5 years with circuit verification and optimization including layout verification and parasitic extractions of the circuits + Strong communication skills… more
- Global Foundries (Essex Junction, VT)
- …DC/AC and RF test and analysis of discrete electrical devices like HBTs, CMOS , resistors, caps etc Other Responsibilities: + Perform all activities in a safe ... s-parameters, loadpull and noise figure + Simulation and design layout experience using Cadence or related software + Experience...R, Python etc + Experience in semiconductor processing in CMOS or SiGe technologies for RF + Strong written… more
- Broadcom (Irvine, CA)
- …The candidate will work closely with other experts in the fields of CMOS process technology, device & modeling, process and device reliability, digital & analog ... Responsibilities as part of technology evaluation will involve test structure layout , verification, extraction, simulation, and silicon evaluation. The job scope… more
- Micron Technology, Inc. (Richardson, TX)
- …being responsible for design, optimization, and verification. Use of both analog and digital CMOS design skills will be needed to work on the various circuits you ... speed/area/power/complexity + Experience with circuit verification and optimization including layout verification and parasitic extractions of the circuits +… more