- SpaceX (Sunnyvale, CA)
- ASIC/SOC DFT Engineer (Silicon Engineering) Sunnyvale, CA...Rule Check (DRC) tools + Integration and verification of Design for Test ( DFT ) fabrics ... ultimate goal of enabling human life on Mars. ASIC/SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're...fast, reliable internet to millions of users worldwide. We design , build, test , and operate all parts… more
- Broadcom (San Jose, CA)
- …and cutting edge network switching ASIC DFx ( Design for Test /debug & manufacturability) from DFT architecture, to implementation, verification, timing ... Description:** Broadcom's CSG division is seeking candidate for a DFT lead position. The successful candidate will be responsible...cost for test . **Responsibilities** + Drive the test quality of the products from Design … more
- NVIDIA (Santa Clara, CA)
- …in Electrical Engineering or a related field + 5+ years of hands-on experience in Design -For- Test ( DFT ) + Deep knowledge of DFT tools, methodologies, ... today. NVIDIA's DFX team is looking for an exceptional DFT Engineer to help shape the future...future of compute. As stewards of the entire Scan Test Lifecycle, we drive innovation for the most advanced… more
- NVIDIA (Santa Clara, CA)
- …with 5+ years, MSEE with 3+ years, or PhD with 2+ years of experience in DFT , system architecture, or RTL design . + Understanding of fundamental DFT topics, ... works on groundbreaking innovations involving crafting creative solutions for cutting edge test techniques, in-system test architecture, as well as verification… more
- NVIDIA (Santa Clara, CA)
- …human imagination and intelligence. Make the choice to join us today. Design -for- Test Engineering at NVIDIA works on groundbreaking innovations involving ... crafting creative solutions for DFT architecture, verification and post-silicon validation on some of...work with cross functional teams, implementing state-of-the-art designs in test access mechanisms, IO BIST, memory BIST and scan… more
- Northrop Grumman (Linthicum Heights, MD)
- …to obtain and maintain an active clearance.** **Roles and Responsibilities:** + Responsible for DFT ( Design for Testabilty) aspects of ASIC Design thorough ... or SystemVerilog RTL coding and be highly proficient in DFT methodologies. + Responsible for operating in a team...+ Experience in full product life cycle of ASIC Design + Experience with Cadence and/or Mentor test… more
- IBM (Poughkeepsie, NY)
- …you will be a great fit for our team. **Your role and responsibilities** As a Test Design Engineer , you will be responsible for architecting and implementing ... high-performance silicon in innovative ways. We're looking for a DFT Engineer who values teamwork and brings...as DFT Compiler, TetraMax and TestMax for design testability analysis and test point insertion… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... debug and issue resolution. + Mentor junior engineers on test design strategies and trade-offs related to...using JasperGold is a plus. + Deep expertise in DFT design , methodology, and implementation. + Familiarity… more
- BAE Systems (Hudson, NH)
- …career with BAE Systems. BAE Systems is seeking a Producibility and Launch Program Engineer (P2L Engineer ) to provide design expertise and leadership within ... areas: + Design For Manufacturability (DFM) + Design For Testability ( DFT ) + Design...Focusing on affordability and producibility activities early in the design process, the P2L Engineer will help… more
- Amazon (Redmond, WA)
- …or granted asylum. Key job responsibilities We are looking for Electrical Test Engineer (s) capable of operating in a fast-paced, ever-changing, multi-platform ... test , and process development. As an Electrical Test Engineer on our team, you will...concurrently with the design engineers to provide design for testability ( DFT ) feedback throughout the… more