• Senior Staff DFT Engineer

    Renesas (Austin, TX)
    Senior Staff DFT Engineer Job Description **About the team:** As part of Renesas's Infrastructure Power Business, you will contribute to the development of our ... in the datacenter. **What we need:** We are seeking a Mixed-Signal DFT Engineer to ensure efficient, high-coverage, testability for analog and mixed-signal designs.… more
    Renesas (11/22/25)
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  • DFT Engineer

    Broadcom (San Jose, CA)
    …you apply.** **Job Description:** Broadcom's CSG division is seeking candidate for a DFT lead position. The successful candidate will be responsible for leading most ... network switching ASIC DFx (Design for Test/debug & manufacturability) from DFT architecture, to implementation, verification, timing closure, ATE pattern bringup. .… more
    Broadcom (11/19/25)
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  • DFT IC Design Engineer

    Broadcom (Colorado Springs, CO)
    …Account, please Sign-In before you apply.** **Job Description:** Broadcom is searching for a DFT IC Design Engineer to join the Data Center Solutions Group at our ... specifically, this position will require in-depth knowledge and expertise towards DFT related aspects of silicon. **Responsibilities include, but are not limited… more
    Broadcom (10/30/25)
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  • ASIC/SOC DFT Engineer (Silicon Engineering)

    SpaceX (Sunnyvale, CA)
    ASIC/SOC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... ultimate goal of enabling human life on Mars. ASIC/SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our...tools + Integration and verification of Design for Test ( DFT ) fabrics and IP within Subsystems + Running and… more
    SpaceX (12/18/25)
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  • ASIC DFT DV Technical Leader

    Cisco (San Jose, CA)
    …**Your Impact:** You will be in the Silicon One development organization as a senior DFT verification lead in San Jose, CA. You will work with Front-end RTL teams, ... physical design teams to understand chip architecture and drive high-quality DFT verification. **Key Essential Functions:** + Responsible for thorough test planning… more
    Cisco (12/13/25)
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  • Senior Principal DFT Design Engineer

    Cadence Design Systems, Inc. (Austin, TX)
    …looking for SoC/ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and experience in scan chain insertion, compression scan ... SoC/ASIC Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT...( DFT ) + Should possess intimate knowledge of DFT insertion flows + Basic scan chain insertion using… more
    Cadence Design Systems, Inc. (12/05/25)
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  • Design Automation DFT Engineer

    Broadcom (Fort Collins, CO)
    …have a Candidate Account, please Sign-In before you apply.** **Job Description:** ** DFT Design Automation Engineer** Broadcom's ASIC Products Division is seeking a ... Design Automation Software Development Engineer in the Design For Test ( DFT ) team developing SoC ASIC products. They will define, develop, deploy and support the… more
    Broadcom (11/20/25)
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  • Senior DFT Engineer

    NVIDIA (Santa Clara, CA)
    …Make the choice to join us today. NVIDIA's DFX team is looking for an exceptional DFT Engineer to help shape the future of compute. As stewards of the entire Scan ... teams to drive scalable, automated solutions. + Co-architect novel DFT strategies alongside VLSI and Product Engineering teams to...field + 5+ years of hands-on experience in Design-For-Test ( DFT ) + Deep knowledge of DFT tools,… more
    NVIDIA (10/17/25)
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  • Senior DFT Engineer

    NVIDIA (Santa Clara, CA)
    …NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the ... + In addition, you will help develop and deploy DFT methodologies for our next generation products. + You...MSEE with 3+ years of experience or PhD in DFT or related domains + Demonstrated knowledge and expertise… more
    NVIDIA (10/29/25)
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  • Senior DFT Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …with 5+ years, MSEE with 3+ years, or PhD with 2+ years of experience in DFT , system architecture, or RTL design. + Understanding of fundamental DFT topics, such ... Excellent understanding of MBIST and IOBIST fundamentals. + Experience in architecting DFT access mechanisms in 3D stacked and dielet/chiplet based designs, and UCIe… more
    NVIDIA (10/17/25)
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