• Senior Test Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …+ Actively participate in cross function team including Product Development Engineering, DFT , and IC design to efficiently debug any product failures and implement ... with SRAM testing and familiarity with 2.5D or MCM assembly + Understanding of DFT insertion techniques including SCAN, ATPG, MBIST and IOBIST + Knowledge of system… more
    NVIDIA (11/23/25)
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  • Senior ASIC Physical Design and Timing Engineer

    NVIDIA (Santa Clara, CA)
    …such as CPUs, GPUs or Network processor implementation or SOCs. + Understanding of DFT logic and experience with DFT timing closure for various modes eg, ... scan shift and capture, transition faults, BIST, etc. + Knowledge of deep sub-micron technology and associated process variations effects, including modeling and converging considering process variations. + Experience in methodology and/or flow development as… more
    NVIDIA (11/22/25)
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  • Post Doctoral Research Associate

    New Jersey Institute of Technology (Newark, NJ)
    …biosynthetic pathways. In parallel, the researcher will use Density Functional Theory ( DFT ) to explore the reaction pathways of these intermediates under biological ... Preferred Qualifications: -Experience with computational studies of organic mechanisms using DFT is preferred. -Experience with live cell experiments is preferable… more
    New Jersey Institute of Technology (11/20/25)
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  • Postdoctoral Appointee - ML-Accelerated Electronic…

    Argonne National Laboratory (Lemont, IL)
    …under applied bias. Methods may include density functional theory ( DFT )-based approaches, coupled with effective continuum and/or tight-binding models derived ... potential in 2D materials + Perform large-scale materials simulations (eg, DFT , tight-binding, continuum models) to generate training and validation datasets +… more
    Argonne National Laboratory (11/19/25)
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  • PCB Designer (Teradyne, North Reading, MA)

    Teradyne (North Reading, MA)
    …reviews and mentor junior designers + Partner with cross-functional teams to ensure DFM/ DFT and quality standards All About You We seek individuals who share our ... and related EDA tools + Experience with PCB design constraint capture and DFM/ DFT practices + Strong organizational skills and attention to detail + Excellent… more
    Teradyne (11/11/25)
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  • Senior Custom ASIC Engineering Lead

    Broadcom (Irvine, CA)
    …leading external and internal cross-functional teams in areas such as physical design, STA, DFT , and packaging? Have you taped out so many chips that you can ... coding Front-end logic design verification, DRC, logic synthesis + Knowledge of DFT methods including scan, memory BIST and repair **Education and Experience… more
    Broadcom (11/06/25)
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  • Optomechanical Design Engineer

    Applied Materials (Santa Clara, CA)
    …Product Life Cycle (PLC) process by defining Design For Transportability ( DFT ) requirements and influencing product design. Identify and execute continuous ... engineering disciplines and operations personnel to develop solutions that adhere to DFT and DFM requirements. Successful Candidates For This Position Will Have MS… more
    Applied Materials (11/06/25)
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  • Senior Reliability Methodology Development…

    NVIDIA (Santa Clara, CA)
    …+ Collaborate with design, product, and test engineering teams to apply DFT methodologies to improve reliability screening specific to HTOL (Component level Hight ... + Hands-on experience in HTOL hardware development + Background in DFT , including techniques for enhanced screening, debugging, and stress pattern development… more
    NVIDIA (10/30/25)
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  • Postdoctoral Fellow - Atomistic Simulations and AI…

    Johns Hopkins University (Baltimore, MD)
    …experience in one or more of the following: Density Functional Theory ( DFT ), machine-learned force fields (MLFF), graph neural networks (GNNs), or large language ... or junior researchers. Specific Duties & Responsibilities + Conduct high-throughput DFT calculations and manage large-scale materials datasets. + Develop GNN… more
    Johns Hopkins University (10/28/25)
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  • ATE Test Engineer

    NVIDIA (Santa Clara, CA)
    …+ Actively participate with cross functional teams including Product Development Engineering, DFT , and IC design to efficiently debug product failures and implement ... collaboration skills + Excellent debugging and analytical skills + Understanding of DFT insertion techniques including SCAN, ATPG, MBIST and IOBIST. Ways to stand… more
    NVIDIA (10/26/25)
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