• Senior System Software Engineer - QNX BSP and IO…

    NVIDIA (Santa Clara, CA)
    …based SOCs + Prior hands-on experience in Ada/SPARK programming (including specification and formal verification ) and TLA+ formal verification modeling ... strong C and/or Ada/SPARK programming skills, and experience with formal methods, we want to hear from you! Join...revolutionizing the industry. We are making extensive use of formal methods to automate our work flow and increase… more
    NVIDIA (12/04/25)
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  • Senior ASIC Design Engineer (NetSec)

    Palo Alto Networks (Santa Clara, CA)
    formal methods, and silicon bring-up. + **Collaborate** with verification engineers to debug complex scenarios, close coverage, and add design-for-debug ... with DDR5 memory, Ethernet (IEEE 802.3), or search-algorithm accelerators. + Formal - verification ownership. + Hands-on silicon validation and lab bring-up.… more
    Palo Alto Networks (12/15/25)
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  • Systems Engineer

    Actalent (Anaheim, CA)
    …for the Integration & Testing (I&T) of maritime programs. This role involves formal verification , formal validation, and system integration. Additional ... + Conduct integration and testing of maritime programs. + Perform formal verification and validation processes. + Support the creation of architectural drawings… more
    Actalent (12/23/25)
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  • ASIC/SOC DFT Engineer (Silicon Engineering)

    SpaceX (Sunnyvale, CA)
    …of design blocks using Verilog/SystemVerilog + Familiar with UPF (unified power format), formal verification , and DRC rule checking experience + Ability to work ... RTL and physical design Scan Design Rule Check (DRC) tools + Integration and verification of Design for Test (DFT) fabrics and IP within Subsystems + Running and… more
    SpaceX (12/18/25)
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  • Sr. Principal Solutions Engineer - Front End

    Cadence Design Systems, Inc. (Austin, TX)
    …pre-silicon verification activities, including Lint, Clock Domain Crossing (CDC), Formal Verification (FV), and other quality checks. Collaboration: Work ... closely with cross-functional teams, including Design Verification (DV), Physical Design (PD), Architecture, and firmware engineers, to ensure successful delivery.… more
    Cadence Design Systems, Inc. (12/10/25)
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  • Senior Computer Systems Engineer/Architect

    GovCIO (Frankfort, KY)
    …description, system planning and design, and ensures requirements comply through formal verification methods. Translates high level product development ... network services, equipment and devices + Generates system level requirements verification procedures and customer acceptance test procedures + Monitors system… more
    GovCIO (11/21/25)
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  • Sr Principal Systems Engineer

    Northrop Grumman (Melbourne, FL)
    …the product baseline under configuration control, managed and authorized for final formal verification activities by the technical community towards completion ... as a whole. The resulting product configuration baseline supports system verification and any other required system level testing. Early interface development… more
    Northrop Grumman (10/28/25)
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  • Digital Design: SerDes Digital IP Design Engineer

    Broadcom (Fort Collins, CO)
    …RTL design to synthesis, RTL/ netlist audits (using tools such as Spyglass), Formal verification , constraints development and analysis w/ emphasis on CDCs in ... Design: SerDes Digital IP Design Engineer:** Oversees definition, design, verification co-definition, and documentation for SerDes development. Performs architecture… more
    Broadcom (11/12/25)
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  • Test Engineer

    Actalent (Minneapolis, MN)
    …field required; BSEE or CS preferred. + 1-4 years of experience in firmware formal verification and validation product testing and requirements. + At least 1 ... Validation, test plan development, software testing, firmware, and hardware. + Design verification and full system testing. + Ability to read and interpret… more
    Actalent (12/13/25)
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  • Manager, Digital Design - Mixed-Signal High-Speed…

    NVIDIA (Santa Clara, CA)
    verification methodologies, such as UVM + Proficiency with static timing and formal verification tools + Excellent communication and leadership skills, with ... such as filters and analog calibration circuits + Ensure verification of digital designs using direct and random testing...Establish and maintain standard methodologies for mixed-signal design and verification What we need to see: + MS or… more
    NVIDIA (12/09/25)
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