- L3Harris (Camden, NJ)
- …sign-on payment in the amount of $ 15,000 . Job Description: Reporting to the Manager , Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) ... national security. Job Title: ASIC/FPGA Design: Senior Member of Engineering Staff (SMES) Job Code: 26283 Job Location: Camden,...system requirements and developing detailed architecture + Execute design ( RTL AND/OR HLS (C++ to RTL )) and… more
- Google (Sunnyvale, CA)
- **Minimum qualifications:** + Bachelor's degree in Electrical Engineering , Computer Engineering , Computer Science, or a related field, or equivalent practical ... **Preferred qualifications:** + Master's degree or PhD in Electrical Engineering , Computer Engineering or Computer Science, with...role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive… more
- Google (Portland, OR)
- **Minimum qualifications:** + Bachelor's degree in Electrical Engineering , Computer Engineering , Computer Science, or a related field, or equivalent practical ... of experience in high-performance CPU, cache subsystem or AI accelerator logic/ RTL design including microarchitecture definition and PPA optimizations. + 6 years… more
- Amazon (Sunnyvale, CA)
- Description As an SoC Manager , you will lead a team responsible for executing and delivering complex IPs and silicon that ship in the Blink and Ring camera products. ... Key job responsibilities - Lead, hire and develop a world-class engineering team for silicon development, including expertise in front-end microarchitecture, … more
- Amazon (San Diego, CA)
- …The Project Kuiper team is looking for a Sr. Technical Program Manager with experience in ASIC/SOC development, from architecture to pre-production stages, project ... and program management. The role will interface with cross-functional engineering and program/product management teams to develop ASIC/SOCs solutions that… more
- BAE Systems (Manchester, NH)
- …split between working onsite and remotely. BAE Systems is seeking an FPGA Design Manager to work within our Electronic Systems business area leading an FPGA Design ... aptitude and leadership skills. Experience leading design engineers within multi-disciplined engineering teams through all phases of an ASIC or FPGA development… more
- Cisco (San Jose, CA)
- …+ Location:San Jose, California, US + Area of InterestEngineer - Hardware + Compensation Range152400 USD - 221800 USD + Job TypeProfessional ... and storage into a single system. With tightly integrated hardware and software solutions, you'll gain exposure to all...timing modes + Option to also do block level RTL design or block or top-level IP integration +… more
- Cisco (San Jose, CA)
- …+ Location:San Jose, California, US + Area of InterestEngineer - Hardware + Compensation Range168800 USD - 241200 USD + Job TypeProfessional ... timing modes. + Option to also do block level RTL design or block or top-level IP integration. +...**Minimum Qualifications:** + Bachelor's Degree in Electrical or Computer Engineering with 8+ years of ASIC or related experience… more
- Silvus Technologies (Los Angeles, CA)
- …passive candidates and stakeholders. + Understanding of technical roles (eg, software development, hardware engineering , digital design, etc.). + **Must be a US ... Hunter, etc.). + Demonstrated knowledge of technical job profiles, eg Software Development, Hardware Engineering , R&D, Product Design, Sales Engineering . +… more