• Silicon Design Engineer, Hardware Acceleration,…

    Google (Mountain View, CA)
    …video quality and compression efficiency while balancing performance, power, and area. Utilize high - level synthesis ( HLS ) to accelerate complex algorithm ... full Application-Specific Integrated Circuit (ASIC) design flow, including UVM/OVM verification, synthesis , and timing closure. + Experience leading projects with … more
    Google (08/30/25)
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  • Field Programmable Gate Array (FPGA) Engineer

    UIC Government Services and the Bowhead Family of Companies (Dahlgren, VA)
    …processing, and networking applications. * Familiarity with System Verilog, UVM methodology, or high - level synthesis ( HLS ). Physical Demands: + Must ... for complex hardware applications. You will work with VHDL, Verilog, and high - level synthesis tools, collaborating with cross-functional teams to ensure… more
    UIC Government Services and the Bowhead Family of Companies (08/13/25)
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  • Senior Member Engineering Staff-ASIC/FPGA Design

    L3Harris (Camden, NJ)
    …OS. + Knowledge of PCIe, NVMe, USB protocols. + Experience with High level synthesis (Xilinx Vivado HLS , AND/OR Mentor Calypto ). In compliance ... (CDC), Reset Domain Crossing (RDC), Questa Lint, and Catapult ( HLS ). This is a key, high impact...Formal, Lint) + Generate test plans + Perform module level verification, synthesis /STA, Lab debug, SW driven… more
    L3Harris (07/23/25)
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  • Staff ASIC & FPGA Design Engineer (Hybrid…

    Lockheed Martin (King Of Prussia, PA)
    …\- Familiarity with Software Defined Radios & VITA 49\.2 standard \- Experience with Vitis High Level Synthesis \( HLS \) tools & concepts \- Understanding ... prototyping, & deploying state\-of\-the\-art Radio Frequency \(RF\) transceivers with high performance embedded processors into integrated system solutions\. **What… more
    Lockheed Martin (08/27/25)
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  • Converged Sensors Engineering

    Lockheed Martin (King Of Prussia, PA)
    …\- Familiarity with Software Defined Radios & VITA 49\.2 standard \- Experience with Vitis High Level Synthesis \( HLS \) tools & concepts \#LI\-AR2 ... prototyping, & deploying state\-of\-the\-art Radio Frequency \(RF\) transceivers with high performance embedded processors into integrated system solutions\. * An… more
    Lockheed Martin (07/23/25)
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  • Digital Electronics Staff Engineer 2

    SLAC National Accelerator Laboratory (Menlo Park, CA)
    …skills. **Preferred Qualifications:** + Experience with embedded signal processing in Vivado or Vitis High - Level Synthesis ( HLS ) is a plus. + Experience ... spanning concept, design, testing and operation and maintenance of high -speed data acquisition and electrical control systems for research...the Linac Coherent Light Source (LCLS) X-ray laser and high speed X-ray detectors, FACET high energy… more
    SLAC National Accelerator Laboratory (07/21/25)
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  • FPGA Development Engineer, Annapurna Labs

    Amazon (Austin, TX)
    …hardware optimization techniques - Hands-on experience with Xilinx Vitis development environment and High - Level Synthesis ( HLS ) - Experience implementing ... Description Annapurna Labs builds high -performance hardware and software solutions used in AWS...and you'll work with multiple technology areas. You'll have high standards for yourself and everyone you work with,… more
    Amazon (07/11/25)
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  • Virtual Platform Hardware Modeling Engineer

    Meta (Sunnyvale, CA)
    …Python to automate design flows, creation of collateral data 19. Experience with high level C or C++ synthesis ( HLS ) 20. Working knowledge of Verilog ... to map the human body.We are seeking a modeling Engineer to develop high - level models of complex SoC hardware. The virtual platforms combine models of custom… more
    Meta (08/13/25)
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