- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Verification Engineer ! NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. ... specific role will be part of a front-end multi-media IP team responsible for a varied set of multi-media...team responsible for a varied set of multi-media focused IP 's. What you will be doing: Depending on individual… more
- Insight Global (Melbourne, FL)
- Job Description Insight Global is looking for five IP Configuration Engineers to support a large modernization project across 4,000+ sites. They will be working on a ... The Engineers will be responsible for engineering customized configurations for IP networking equipment based on the customers' requirements. The Engineers must… more
- NVIDIA (Austin, TX)
- NVIDIA is looking for a Senior ASIC Verification Engineer to help verify our global IP ! This position offers an opportunity to impact an array of products while ... + Develop test plans, tests and verification infrastructure for verifying global IP across multiple products + Define, develop, and automate flows and methodologies… more
- Motion Recruitment Partners (Arlington, VA)
- Firewall Engineer - Palo Alto/F5 BIG- IP SME focus Arlington, Virginia **100% Remote** Contract $60/hr - $70/hr Firewall Engineer Our client is looking for ... and configuring enterprise-scale firewalls (Palo Alto preferred) * 1+ year supporting F5 BIG- IP platforms (LTM, GTM, APM, AFM, AWAF) * 1+ year with BIG-IQ… more
- General Dynamics Information Technology (Schofield, HI)
- …years of related experience **US Citizenship Required:** Yes **Job Description:** SYSTEMS ENGINEER SENIOR Deliver simple solutions to complex problems as a Systems ... Engineer with GDIT at the Joint Multinational Simulation Center...at the Joint Multinational Simulation Center - Indo Pacific (JMSC- IP ), the Pacific's premier simulation complex. Here, you'll tailor… more
- Broadcom (Fort Collins, CO)
- …Sign-In before you apply.** **Job Description:** **Digital Design: SerDes Digital IP Design Engineer :** Oversees definition, design, verification co-definition, ... and documentation for SerDes development. Performs architecture design, rtl development, constraints, synthesis, timing analysis, verification, documentation, and support for SerDes designs. Knowledge of all aspects of the process flow from high-level RTL… more
- Amazon (Cupertino, CA)
- …overall debugging skills - Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing Preferred Qualifications - Master's degree ... in Electrical or Communications Engineering or a related field - Experience with formal verification techniques including abstraction and end-to-end checking - Experience with ARM and various DSP ISAs - Experience with current and upcoming RF standards in… more
- NVIDIA (Santa Clara, CA)
- …the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and ... CPU clocking. The team collaborates with the front design team to understand the clocking requirements for the chip. The clocks team interacts with the floor-planning and back end team to help craft the physical floorplan of the chip. The team explains the… more
- BD (Becton, Dickinson and Company) (Brea, CA)
- …that enhance BD's brand recognition, including writing technical papers and generating intellectual property ( IP ), while staying current with industry ... under the guidance of others. Creates and tests prototypes. Maps the intellectual property landscape. Has developed knowledge and skills in own job family; still… more
- Broadcom (Fort Collins, CO)
- …by delivering best in class technology platforms, easy to integrate bleeding edge intellectual property , and by providing world class customer support. APD's ... products that incorporate Broadcom's High Bandwidth Memory (HBM) PHY IP with HBM DRAM memory modules. This role requires...Include:** + Develop a detailed understanding of Broadcom's HBM IP , how to control and evaluate the IP… more
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