• Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Mask Design Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... highly motivated engineers to work on the physical layout design and development of our next generation custom SRAM...other team members on the new process technologies to design the layout of high-speed memory macros. You will… more
    NVIDIA (06/10/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing ... equivalent experience. + Minimum of 7+ years industry experience in Mask and Layout Design . + Deep understanding of analog circuit layout concepts in submicron… more
    NVIDIA (07/17/25)
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  • Integrated Circuit (IC) Layout and Mask

    MIT Lincoln Laboratory (Lexington, MA)
    …the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout, material growth and characterization, ... as a member of a multi-disciplinary team responsible for the design and layout of lithographic masks for silicon-based, compound-semiconductor, and… more
    MIT Lincoln Laboratory (05/29/25)
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  • Global Tapeout and Mask Operations, Biz App…

    Global Foundries (Austin, TX)
    …is a leading full-service semiconductor foundry providing a unique combination of design , development, and fabrication services to some of the world's most inspired ... Tapeout and Mast Operations (GTMO) Biz App and data engineer , the candidate will work with our team of...teams to create software solutions. + Enabling scalable, Electronic Design Automation (EDA) functions in a Cloud environment. +… more
    Global Foundries (06/30/25)
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  • Electronic-Photonic Process Design Kit…

    MIT Lincoln Laboratory (Lexington, MA)
    …the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout, material growth and characterization, ... cell libraries, documenting code and methodology updates, and documenting layout changes. The engineer will collaborate with others involved in mask layout from… more
    MIT Lincoln Laboratory (08/08/25)
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  • Design Engineer

    Safran (NY)
    …Oxygen Systems US supports commercial, military and general aviation life support equipment. Design engineer will support gaseous, mask and chemical oxygen ... Design Engineer Company : Safran Aerosystems... Design Engineer Company : Safran Aerosystems Oxygen Job field...meeting the applicable customer, regulatory, and company policies. The Design Engineer will ensure a successful transfer… more
    Safran (07/10/25)
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  • 3D Heterogeneous Integration Design

    Global Foundries (Malta, NY)
    …www.gf.com . Summary of Role: GlobalFoundries Fab8 is seeking a motivated R&D design enablement engineer to become part of our state-of-the-art 300mm fabrication ... is a leading full-service semiconductor foundry providing a unique combination of design , development, and fabrication services to some of the world's most inspired… more
    Global Foundries (07/23/25)
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  • Quantum Device Design Engineer

    Google (Goleta, CA)
    …integration. As a Quantum Integrated Circuit Designer, you will support the physical design of quantum processors and associated analog, DC, and RF devices and help ... to mainstream our interface infrastructures between design and other teams. Our Quantum Processor designs are...prototype designs. Your activities will span from laying out mask schematics, building CAD layouts through programmatic tools and… more
    Google (08/08/25)
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  • Resolution Enhancement Techniques (RET) Process…

    Texas Instruments (Dallas, TX)
    **Change the world. Love your job.** A Process Development Engineer is responsible for the development, characterization and optimization of MEMS resonator devices ... performance targets. **Responsibilities include:** As a Resolution Enhancement Techniques (RET) Engineer , you'll architect new TI products and make our customers'… more
    Texas Instruments (07/03/25)
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  • R&D Engineer Physical Design

    Broadcom (San Jose, CA)
    …major segments of the Semiconductor industry, including AI. Be part of the Design Implementation team within Broadcom ASIC Products Division where we create CMOS ... through product release. Become a member of an ASIC design team responsible for all aspects of physical ASIC...signal integrity. - Physical verification to ensure error free artwork/ mask release. Requirements: + BS Degree in Electrical Engineering… more
    Broadcom (06/03/25)
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