- NVIDIA (Santa Clara, CA)
- …see: + Associates degree (or equivalent experience). + 8+ years proven experience in mask and layout design. + Deep understanding of digital and analog circuit ... NVIDIA products! What you'll be doing: + Perform physical layout for custom embedded SRAM structures in state-of-the-art sub-micron...+ Assist in taking part in floor planning, custom layout and verifying against design rules and schematics. +… more
- MIT Lincoln Laboratory (Lexington, MA)
- …has implemented vertically integrated in-house resources to facilitate design, lithographic mask layout , material growth and characterization, fabrication (eg, ... of a multi-disciplinary team responsible for the design and layout of lithographic masks for silicon-based, compound-semiconductor, and heterogeneous/hybrid… more
- NVIDIA (Santa Clara, CA)
- …world. This is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer? If yes, We would love to hear from you! We ... are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic ... BSEE or equivalent experience. + Minimum of 7+ years industry experience in Mask and Layout Design. + Deep understanding of analog circuit layout concepts in… more
- MIT Lincoln Laboratory (Lexington, MA)
- …has implemented vertically integrated in-house resources to facilitate design, lithographic mask layout , material growth and characterization, fabrication (eg, ... layout changes. The engineer will collaborate with others involved in mask layout from basic layout cell creation and floor-planning to final tapeout.… more
- University of Colorado (Boulder, CO)
- …Wafer dicing, wafer bonding, chip bonding. + Cleanroom process development. + Mask layout , including for double sided wafer processing. + Characterization ... Will Be** + Cleanroom fabrication of MEMS. Processes includes: mask generation, photolithography, photoresist lift-off. Silicon wet etching, DRIE, XeF2… more
- Skyworks (Irvine, CA)
- …stack design solution. * Work with process development team to design Process Development Vehicle mask layout for a new technology and define a new PDK in timely ... manner. * Optimize and automate NPI BAW stack design procedure, minimize simulation and measurement discrepancy, and enhance engineering communication system on BAW stacks for shortening our product development cycle. * Collaborate and openly debate with team… more
- Capgemini (Minneapolis, MN)
- …* Interpreting LVS, DRC and ERC reports to find the fastest way to complete layout * Utilizing advanced CAD tools and mask design knowledge to deliver correct ... you're considering** * 10 years of experience in analog/mixed-signal layout design of deep submicron CMOS circuits and at...PHY, ADCs, DACs, LDOs, etc.) * Experience leading complex layout macros during the full design cycle from floorplan… more
- Skyworks (Irvine, CA)
- …in BAW or SAW filter design for RF front end modules which is including CAD layout and photo mask tapeout process as well as filter circuit topology and ... resonator design optimization. + Requires a good understanding on acoustic resonator/filter performance and its impact to module performance. + Requires a good communication skill to enable understanding a difficulty/priority on each of multiple functional… more
- Texas Instruments (Dallas, TX)
- …teams to create test patterns for patterning process development/monitoring, photomask mask manufacturing support, and OPC model calibration and validation. + ... Layout work will span across all TI technology nodes,...for manufacturing processes for advanced analog nodes. + Developing/improving mask /lithography/etch processes for next node analog nodes through photolithographic… more