• Senior Analog Layout Engineer

    Capgemini (Minneapolis, MN)
    …find the fastest way to complete layout * Utilizing advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent ... **About the job you're considering** * 10 years of experience in analog/mixed-signal layout design of deep submicron CMOS circuits and at least 3 years of recent… more
    Capgemini (10/23/25)
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  • Principal Engineer - DRAM Design Rule

    Micron Technology, Inc. (Boise, ID)
    …teams. + Address process window vs. die size issues arising from database layout techniques. + Collaborate with Design , Product Engineering, Process Integration, ... + Maintain effective communication across Process Integration, Product Engineering, Design , and Advanced Mask teams. + Improve... rule improvement + Ability to define and implement design rules within APR workflows to enhance layout more
    Micron Technology, Inc. (11/21/25)
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  • Analog Mixed Signal Integrated Circuit…

    Google (Mountain View, CA)
    …internally built integrated circuits. + Oversee physical design and guide mask designers to create high quality layout . Information collected and processed ... analog or mixed-signal IC design . + Experience in transistor-level schematic design , layout , simulation, and verification. + Experience with device physics… more
    Google (11/13/25)
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  • Senior SRAM Engineer, Circuit Design

    NVIDIA (Santa Clara, CA)
    …circuits that help power these chips. What you'll be doing: + Design best-in-class SRAM circuits using state-of-the-art technology processes + Optimize circuits for ... performance, area, and power + Supervise mask designers to craft high quality and... designers to craft high quality and dense pitch-matched layout + Verify functionality, electrical integrity, and robustness +… more
    NVIDIA (10/03/25)
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  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …, simulation, and verification of mixed-signal circuits + Supervise closely IC circuit/ mask designers, provide floorplan and layout guidelines + Support lab ... of our Mixed Signal team, you will lead the design of CMOS high-speed interface circuits and mixed-signal circuits....and bring up. What you'll be doing: + Lead design and implementation of high speed interface circuit +… more
    NVIDIA (10/21/25)
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  • Resolution Enhancement Techniques (RET) Process…

    Texas Instruments (Dallas, TX)
    …flows and integrate them into the tape-out pipeline. + Support customer design enablement by providing feedback on layout constraints and manufacturability ... environment. + Excellent problem-solving, analytical, and communication skills. + Knowledge of design rule checking (DRC) and layout versus schematic (LVS). +… more
    Texas Instruments (12/13/25)
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  • Senior Analog and Mixed Signal Engineer

    NVIDIA (Santa Clara, CA)
    …like comparators, digital state machines, high performance op-amps etc. + Work closely with mask design engineers to deliver the physical design as well ... deep-submicron CMOS technologies. Analytical and intuitive understanding of transistor level analog design , layout and simulation is required. + Hands-on … more
    NVIDIA (11/01/25)
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  • Resolution Enhancement Techniques Process…

    Texas Instruments (Dallas, TX)
    …of critical care-abouts for 28 and 22 nm node processing. + Familiarity with physical layout (gds/oas). Knowledge of litho/OPC test pattern design and layout ... **About TI** Texas Instruments Incorporated (TI) is a global semiconductor design and manufacturing company that develops analog ICs and embedded processors.… more
    Texas Instruments (11/04/25)
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  • Senior Staff Semiconductor RF Test Engineer

    Northrop Grumman (Linthicum Heights, MD)
    …engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, test, and assembly. The candidate ... + Hands-on hardware skills including probe card and package part fixture/DIB design & coordinating layout & assembly + Software skills in a modern language such… more
    Northrop Grumman (10/07/25)
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  • Principal / Sr Principal Semiconductor Equipment…

    Northrop Grumman (Linthicum Heights, MD)
    …engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, test, and assembly. **What you'll ... - located in **Linthicum, MD** outside of **Baltimore** - where we design , manufacture, and test semiconductor products for internal and commercial production… more
    Northrop Grumman (11/06/25)
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