- SanDisk (Milpitas, CA)
- …keep our world moving forward. **Job Description** We are looking for an experienced **Digital Physical Design Engineer ** to work whole digital SPR flow from ... to GDS, include Synthesis, DFT scan insertion, PNR, STA timing analysis, IRdrop power analysis, DRC/LVS verification. Experienced Cadence...REQUIRED: + **Experience:** A minimum of 3 years in Physical design digital RTL to GDS flow.… more
- SanDisk (Milpitas, CA)
- …our world moving forward. **Job Description** We are looking for highly motivated **Electronic Design Engineers - Physical Design ** to join our Memory ... memory design . **ESSENTIAL DUTIES AND RESPONSIBILITIES:** + Drive all aspects of physical design , including logic synthesis, place and route (P&R), and … more
- Micron Technology, Inc. (Richardson, TX)
- …growing due to high demand from industry leading semiconductor companies. As a HBM Memory Physical Design Engineer in sustaining role you will be working ... mixed-signal, digital block and full chip level integration from physical design and layout design ...device parasitic etc.). + Have a good understanding of timing /area/power/complexity trade-offs in DRAM or mixed-signal design .… more
- Silvus Technologies (Irvine, CA)
- …fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer - Signal Processing_** who will report to the _Senior Engineering ... using Verilog and System-Verilog. + Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple clock-domain and/or… more
- SanDisk (Milpitas, CA)
- …of digital design in NAND Flash memory, focusing on micro architecture, RTL design , verification, logic synthesis, and timing analysis to deliver a design ... and verification in Verilog, RTL linting, clock domain crossing (CDC) analysis, design integration, synthesis, DFT, timing analysis and closure + Balance … more
- SanDisk (Milpitas, CA)
- …of digital design in NAND Flash memory, focusing on micro architecture, RTL design , verification, logic synthesis, and timing analysis to deliver a design ... and verification in Verilog, RTL linting, clock domain crossing (CDC) analysis, design integration, synthesis, DFT, timing analysis and closure + Balance … more
- Silvus Technologies (Irvine, CA)
- …to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Senior FPGA/RTL Design Engineer_** who will report to the _Director of FPGA Engineering_ on the ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
- Teradyne (North Reading, MA)
- …interface protocols + Use of digital simulation tools to verify designs. + Creation of physical design constraints for placement, timing closure and CDC + ... Overview Our Hardware Engineering team is seeking an FPGA/ASIC Design Engineer to work with a multi-disciplined...such as Python, TCL and Perl + Experience with physical design tools from FPGA vendors (Vivado… more
- Renesas (Duluth, GA)
- Principal Digital Design Engineer Job Description + Propose, architect, and design RTL in Verilog for use in a mixed-signal integrated circuit + Contribute ... , architecture, and verification reviews + Oversee digital backend design , including synthesis, static timing analysis, and...ATE support (a plus) + Experience in DFT or physical design (a plus) Company Description Renesas… more
- Micron Technology, Inc. (Folsom, CA)
- …communicate and advance faster than ever. We are searching for a High Speed I/O Design engineer at our Micron Technology's HBM Team in Folsom, California. As a ... high speed Design engineer , you will be working for...minimize source of clock jitter. + Determine sources of timing variation + Establish timing budgets related… more
