- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...methods and techniques + Strong background in STA, extraction, timing and RC correlation + Background with design… more
- SanDisk (Milpitas, CA)
- …of digital design in NAND Flash memory, focusing on micro architecture, RTL design , verification, logic synthesis, and timing analysis to deliver a design ... and verification in Verilog, RTL linting, clock domain crossing (CDC) analysis, design integration, synthesis, DFT, timing analysis and closure + Balance … more
- SanDisk (Milpitas, CA)
- …of digital design in NAND Flash memory, focusing on micro architecture, RTL design , verification, logic synthesis, and timing analysis to deliver a design ... and verification in Verilog, RTL linting, clock domain crossing (CDC) analysis, design integration, synthesis, DFT, timing analysis and closure + Balance … more
- Broadcom (San Jose, CA)
- …before you apply.** **Job Description:** **Broadcom is looking for a senior level ASIC physical design engineer . In this highly visible role, you will ... or Computer Engineering with 6+ years of experience in Physical design .** + **Deep knowledge about industry...chip and block level.** + **Experience with CDC, static timing analysis methodologies and relevant tools.** + **Exposure to… more
- NVIDIA (Santa Clara, CA)
- …see how you can make a lasting impact on the world! We are now looking for a Physical Design Methodology and DevOps Engineer ! This is a DevOps role where you ... with Elasticsearch / Kibana / Vega. + Experience with Static Timing Analysis / VLSI Physical design . + Debugging experience for Relational databases and… more
- Amazon (Austin, TX)
- …you - come build the future with us! Key job responsibilities * Perform physical design for Amazon's machine learning custom silicon solutions * Participate in ... various aspects of physical design : full chip floorplanning, circuit analysis,...design : full chip floorplanning, circuit analysis, power/clock distribution, timing optimization, place and route, power integrity analysis, and… more
- Medtronic (Tempe, AZ)
- …circuits design team in Tempe, Arizona, is seeking a Sr. Digital Design Engineer -With academic or professional background in low power IC design ... this IC Design Team, the **Senior Digital Design Engineer ** will be involved in all...to drive best implementation for floor planning, clock tree design , timing closure, and low power. +… more
- SpaceX (Irvine, CA)
- Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...timing constraint for those IPs and support the physical implementation team (synthesis, timing closure, formality… more
- NVIDIA (Santa Clara, CA)
- … closure to innovate and implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate Clocking concerns and ... will be architecting the clock domain to satisfy functional, physical and testing design requirements. + Engage...of innovative NVIDIA chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing… more
- NVIDIA (Hillsboro, OR)
- …meet performance, timing and power targets. + Deliver a synthesis/ timing clean design while working with the physical design team ensuring a routable ... We are looking for a Senior CPU Design Engineer ! NVIDIA is seeking best-in-class...fellow design engineers, architects, verification engineers, and physical design engineers to accomplish your tasks.… more
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