- Teradyne (North Reading, MA)
- …interface protocols + Use of digital simulation tools to verify designs. + Creation of physical design constraints for placement, timing closure and CDC + ... Overview Our Hardware Engineering team is seeking an FPGA/ASIC Design Engineer to work with a multi-disciplined...such as Python, TCL and Perl + Experience with physical design tools from FPGA vendors (Vivado… more
- NVIDIA (Santa Clara, CA)
- …and floorplan improvement opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and ... We are now looking for a Senior ASIC Floorplan Design Engineer ! NVIDIA is seeking a talented...What you will be doing: + Working with architects, design leads, physical design leads… more
- NVIDIA (Santa Clara, CA)
- …architecture modeling team to determine proper expected design behavior. + Work with physical design engineers to drive timing , area, and power closure. ... We are now looking for a Senior Video ASIC Design Engineer ! NVIDIA has been transforming computer..., and area optimization, static checks, and support of physical design engineers through place and route.… more
- Silvus Technologies (Los Angeles, CA)
- …a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer - Signal Processing_** who will report to the _Director of FPGA ... using Verilog and System-Verilog. + Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple clock-domain and/or… more
- Amazon (Austin, TX)
- …be working directly with product engineers, signal & power integrity engineers and physical design experts - defining best practices, driving correlation of ... of our start-up like team through excellent collaboration and teamwork with other physical design engineers, product engineers, hardware engineers as well as… more
- Celestica (Maple Grove, MN)
- …Country: USA State/Province: Minnesota City: Maple Grove **Summary** The Staff Engineer , Electrical Design develops new electrical systems/circuits for various ... throughout the manufacturing of the electrical systems they have designed. The Staff Engineer , Electrical Design works in cross functional teams with other… more
- Silvus Technologies (Irvine, CA)
- …fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for ... challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at...and System-Verilog. * Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple… more
- SpaceX (Redmond, WA)
- FPGA/ASIC Design Engineer (Silicon Engineering) Redmond, WA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... ultimate goal of enabling human life on Mars. FPGA/ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...+ Participate in all phases of ASIC and/or FPGA design flow (eg synthesis, timing closure, verification)… more
- Microsoft Corporation (Austin, TX)
- …and optimize the Cloud infrastructure. We are looking for a **Principal Logic Design Engineer ** to join the team. \#SCHIE **Responsibilities** + Establish ... Crossing (CDC), Reset Domain Crossing (RDC), power etc., and timing closure of high-performance digital IP. + Collaborate with...meets both architectural and micro-architectural intent. + Interface with physical design (PD), design for… more
- NVIDIA (Santa Clara, CA)
- … by working closely with verification engineers. + Deliver a synthesis/ timing clean design while working with the physical design team to ensure a ... NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design ...+ Collaborate with architects, verification engineers, software engineers, and physical design engineers to accomplish your goals.… more
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