• Senior Engineer - Design for Test…

    Microsoft Corporation (Austin, TX)
    …highly energetic cross functional team members (Architects, front-end & back-end design /verification, Physical design , and post-silicon manufacturing) with ... the Cloud infrastructure. We are looking for a **Senior Design for Test (DFT) Engineer ** to join...for achieving high fault coverage. + Experience with Static Timing Analysis & constraint generation. + Experience with ATE… more
    Microsoft Corporation (10/09/25)
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  • FPGA Design Engineer

    The Boeing Company (Huntsville, AL)
    …your future with us. Boeing Defense, Space & Security (BDS) seeks a **Senior** **FPGA Design Engineer ** to join our team in Huntsville, AL to develop, debug, and ... of logic design . Generate self-checking test bench, unit test, synthesis, timing analysis, Built-In-Test ( **BIT** ) and support of debug and system integration… more
    The Boeing Company (10/04/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... , Verilog and/or System-Verilog with a deep understanding of physical design and VLSI + Experience with...of ASIC design flow including front end design and verification, DFT, and timing analysis… more
    NVIDIA (08/27/25)
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  • Senior Principal Digital Design

    Leonardo DRS, Inc. (Cypress, CA)
    …for surveillance and targeting applications. We are seeking a Senior Principal Digital Design Engineer to join the company in the development of strategic ... of 10 years of experience working in Electrical Engineering with emphasis in FPGA design + Ability to solve problems at circuit and system levels + Proven experience… more
    Leonardo DRS, Inc. (08/21/25)
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  • Principal Digital Design Engineer

    Leonardo DRS, Inc. (Beavercreek, OH)
    …agencies around the world. **Job Responsibilities** + Involved in FPGA Design , System Simulation, Synthesis, Resource and Power Utilization analysis, Place and ... Route, Timing analysis, Verification, and Integration activities. Generate and execute... closure techniques. + May also be involved with design , build, and test of cutting-edge devices containing both… more
    Leonardo DRS, Inc. (09/02/25)
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  • Memory Circuit Design Engineer

    Broadcom (Mendota Heights, MN)
    …verify various behavioral and physical memory models + Document the design specifications, behavioral description, and timing diagrams + Specify silicon test ... the physical macro + Integrate characterization flow to extract timing and power information + Develop scripts to automate characterization flow, simulations,… more
    Broadcom (09/12/25)
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  • FPGA Digital Design Engineer 3/4

    Northrop Grumman (Los Angeles, CA)
    …making history. Northrop Grumman Advanced Weapons has an opening for a FPGA Digital Design Engineer with an active clearance, to join our team of qualified, ... Qualifications: . Experience with DSP, MATLAB, and SimuLink . Knowledgeable in FPGA physical constraints and achieving timing closure. . Experience with board or… more
    Northrop Grumman (09/27/25)
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  • Mechanical Design Engineer III

    TAIT Towers (Lititz, PA)
    …studies, schematics, storyboards, weight studies, and other supporting tasks to advance the design + engineering process. + Identify appropriate timing and scale ... events and experiences through cutting-edge technology, precision engineering, and creative design . TAIT's 20 global offices have developed iconic productions and… more
    TAIT Towers (09/25/25)
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  • Principal Digital Design Engineer

    Cadence Design Systems, Inc. (Cary, NC)
    …quality. The candidate will contribute to digital architecture, digital RTL, low power design , synthesis and timing analysis, and behavioral coding for all IPs ... join a dynamic and growing team of experienced engineers developing high-performance physical IP for industry-standard protocols. The successful candidate will be a… more
    Cadence Design Systems, Inc. (09/11/25)
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  • IC Design Engineer

    Broadcom (Irvine, CA)
    …and technically strong engineer to join our team. Job Description: Layout design of digital high-performance blocks Timing closure of the blocks with best ... The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are… more
    Broadcom (08/08/25)
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