• Staff Logic Circuit Design Engineer

    Micron Technology, Inc. (Folsom, CA)
    …digital design and RTL development + Good understanding on timing /area/power/complexity tradeoffs in designs + Experience with Synthesis & Constraints + ... HBM RTL designer will need to have significant experience front end digital design ! The designer will be responsible for the development several blocks. Development… more
    Micron Technology, Inc. (08/22/25)
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  • Design and Analysis Engineer

    The Boeing Company (Long Beach, CA)
    …Avionics & Flight Controls (AVFC) team is seeking a mid-career (Level 3) **Electrical Engineer ** to perform Design , Integration and Test activities in support of ... hardware-software integration and troubleshooting - Ability to diagnose data flow, timing issues, and interface mismatches using tools like protocol analyzers, logs,… more
    The Boeing Company (10/08/25)
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  • Principal design engineer , VLSI…

    SanDisk (Milpitas, CA)
    …and full chip circuit simulations to meet all performance specifications. + RTL design , synthesis, static timing analysis and verification in verilog for page ... an exciting opportunity for you. ESSENTIAL DUTIES AND RESPONSIBILITIES: + Architect and design circuits at transistor level and gate level for leading-edge 3D NAND… more
    SanDisk (10/15/25)
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  • Mechanical Design Engineer Intern…

    The Toro Company (Bloomington, MN)
    …engineering principles as well as analytical techniques to ensure that the design specifications of the product will meet the approved specifications, including ... cost, timing , and performance objectives of the product. + Manage...outside consultants, labs, suppliers, etc. needed to accomplish the design or other objectives of the project. + Works… more
    The Toro Company (09/20/25)
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  • Senior Engineer - Physical

    CDM Smith (Gillette, WY)
    …**Business Unit:** IND **Job Description:** As a Senior Substation Engineer - Physical , you'll lead the design and execution of extra high voltage (EHV) ... your expertise in a collaborative environment. Job Description: Electrical Engineer - Physical Lead the design...employment has been made in the United States. The timing of when background checks will be conducted on… more
    CDM Smith (09/27/25)
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  • ASIC Engineer , Implementation

    Meta (Sunnyvale, CA)
    …for Power, Performance, and Area 17. 2. Floor Planning and Placement 18. 3. Physical Design Execution for Clock Tree Synthesis and Routing optimization 19. 4 ... Job" online on this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/ physical synthesis...for Timing , Area, and Power. 2. Debug timing /area/congestion issues and resolve w/ RTL & physical more
    Meta (09/20/25)
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  • STA Principal Application Engineer

    Cadence Design Systems, Inc. (Austin, TX)
    …various tool feature and close tool bug fixes. Work on various aspects of physical design including timing analysis, place and route, extraction, spice ... spice analysis on various tech nodes and customer designs. . Work on In- design timing ECO optimizations solutions with basic knowledge of Place and Route, Clock… more
    Cadence Design Systems, Inc. (08/14/25)
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  • Civil Engineer II - Pavement/Transportation

    City of Lacey (Lacey, WA)
    Civil Engineer II - Pavement/Transportation Print (https://www.governmentjobs.com/careers/laceywa/jobs/newprint/5088473) Apply  Civil Engineer II - ... and Maintenance Supervisor in the Public Works Department, the Civil Engineer II performs professional-level and technically complex civil engineering work in… more
    City of Lacey (10/09/25)
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  • Technologist - High Speed IO/Datapath…

    SanDisk (Milpitas, CA)
    …architectures and other clock recovery and schemes. + In-depth knowledge of Timing budgeting and Analysis in custom high-speed designs + Working knowledge of ... orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected… more
    SanDisk (08/02/25)
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  • Principal Product Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …+ Experience in design and EDA with an emphasis on Cadence tools of Synthesis, Physical Design & timing closure at 20nm or below nodes + Prior Designer, ... You will be a highly motivated, optimistic, and energetic engineer with a good appreciation of ASIC design...and Synthesis, Formal Verification, Low Power design , Physical Design and Timing Closure… more
    Cadence Design Systems, Inc. (09/09/25)
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