• Senior HSIO Validation Engineer

    NVIDIA (Santa Clara, CA)
    …experience + In depth understanding of PCIe (or similar) protocol and characterization/ validation methods in post - silicon environment + Excellent knowledge ... into production. + Develop new methodologies to improve the silicon validation process, which will help meet...of lab equipment (DSOs, BERT, Protocol/Logic analyzers) and Hands-on Post -Si bring up, functional validation of HSIO… more
    NVIDIA (11/27/25)
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  • Senior High-Speed IO Validation

    NVIDIA (Santa Clara, CA)
    …+ In depth understanding of PCI Express (or similar) protocol and characterization/ validation methods in post - silicon environment + Excellent knowledge ... are now looking for a Senior High-Speed IO (HSIO) Validation Engineer ! What you will be doing:...of lab equipment (DSOs, BERT, Protocol/Logic analyzers) and Hands-on Post -Si bring up, functional validation , debug, and… more
    NVIDIA (11/12/25)
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  • Hardware Design & Validation

    ManpowerGroup (Redmond, WA)
    …RTL blocks for AI SoCs, including image and video processing components. + Perform post - silicon and FPGA validation , including test planning, execution, and ... the semiconductor industry, is seeking a Hardware Design & Validation Engineer - AI Semiconductor Systems to...with verification engineers and lead designers to ensure bug-free silicon . **What's Needed?** + 5-7+ years of experience in… more
    ManpowerGroup (09/23/25)
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  • Circuit Characterization Engineer

    NVIDIA (Santa Clara, CA)
    …experience. + 3+ years of relevant experience in silicon bring-up and post silicon validation activities. + Excellent problem solving, collaborative, and ... demonstrate a passion towards creation, execution and improvement of silicon validation plans. What you will be...plans. What you will be doing: + As a Silicon Circuit Characterization engineer for NVIDIA's family… more
    NVIDIA (10/30/25)
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  • Senior Firmware Engineer

    Microsoft Corporation (Redmond, WA)
    …cause analysis of firmware, operating system, and driver-level failures across diverse pre and post silicon platforms in AI server domain. + Develop and maintain ... worldwide and we are looking for a **Senior Firmware Engineer ** to help achieve that mission. As Microsoft's cloud...services. Our teams are responsible for firmware development and validation of server, silicon and rack infrastructure… more
    Microsoft Corporation (11/26/25)
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  • Senior System ASIC Engineer - Speed…

    NVIDIA (Santa Clara, CA)
    …characterization/ validation strategies for these features. + Understand new silicon features and create internal characterization plans to validate benefits, ... needs of the next generation products. Build pre and post - silicon bring up flow and methodologies for...are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want… more
    NVIDIA (11/07/25)
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  • Senior ASIC Design Engineer - DFX

    NVIDIA (Santa Clara, CA)
    …groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post - silicon validation on some of the industry's ... We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over...support both functional and DFT full-chip verification. + Support post - silicon bring-up and validation efforts… more
    NVIDIA (10/25/25)
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  • Senior Firmware Verification Engineer

    Renesas (Austin, TX)
    silicon environments, including RTL simulations and emulation platforms. + Support post - silicon bring-up, validation , and characterization of PMIC ... Senior Firmware Verification Engineer Job Description Renesas Electronics America is seeking...accelerator, networking, and computing platforms. This role focuses on pre- silicon and post - silicon verification, requiring… more
    Renesas (12/10/25)
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  • Software Engineer I

    Cadence Design Systems, Inc. (San Jose, CA)
    …Leverage silicon verification platform and environment to create necessary post - silicon infrastructure, methodology and automation to allow tests executed in ... We are now looking for a hands-on system integration engineer who wants to expand his/her scope, work with...SPI, SERDES, memory and many other interfaces. + Execute post - silicon tests to expose design issues, validate… more
    Cadence Design Systems, Inc. (10/08/25)
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  • R&D Engineer IC Design 3

    Broadcom (Irvine, CA)
    …+ prepare block level resource requirements & development schedule + generate test plans for post silicon validation + This opening work on chip design which ... block level resource requirements & development schedule + generate test plans for post silicon validation Requirement: + _B.S degree in EE or computer… more
    Broadcom (12/03/25)
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