• Senior Technical Marketing Engineer - Data Center…

    NVIDIA (Santa Clara, CA)
    …computing, are driving the next evolution of artificial intelligence by combining high performance compute, networking, and full-stack software to power AI at ... role, you will show how NVIDIA solutions deliver industry-leading inference and training performance and power efficiency while addressing the real challenges of… more
    NVIDIA (01/01/26)
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  • Sr. Technical Program Manager, ASIC

    Amazon (Sunnyvale, CA)
    …for ASIC/SOC development considering all criteria to design products the meet the power / performance and functional specs for all use conditions. - Work with ... ASIC, communication system, EE, and software teams to define ASIC bring-up readiness and test plans. - Work with product/program management lead to ensure that ASIC/SOC development meets schedule, cost, and quality requirements. - Drive engineering project… more
    Amazon (11/27/25)
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  • Software Intern, Summer (Synthesis)

    Cadence Design Systems, Inc. (San Jose, CA)
    …of the Genus Synthesis Solution, a state-of-the-art logic synthesis tool that optimizes Power , Performance , and Area (PPA) for advanced digital ASICs. This ... internship offers hands-on experience in software development for EDA tools, working closely with R&D and product engineering teams in a collaborative, innovation-driven environment. Responsibilities + Design, implement, troubleshoot, and debug software… more
    Cadence Design Systems, Inc. (11/15/25)
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  • Software Engineer, Embedded, Level 5

    Snap Inc. (San Diego, CA)
    …performant and energy efficient solutions Preferred Qualifications: + Experience in power / performance optimizations, including Linux kernel, driver, and user ... space applications. + Understanding of hardware design, ability to read schematics If you have a disability or special need that requires accommodation, please don't be shy and provide us some information… more
    Snap Inc. (11/01/25)
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  • Package Design Engineer

    NVIDIA (Santa Clara, CA)
    …Advanced Technology Group (ATG). NVIDIA's GPUs and SOCs are the world leaders in power , performance and efficiency. We are continually innovating to deliver new ... and creative solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a passionate Package Design Engineer who is committed to making a difference in the world through their contributions. You will be responsible for… more
    NVIDIA (11/01/25)
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  • Product Engineering Intern - Genus Synthesis…

    Cadence Design Systems, Inc. (San Jose, CA)
    …team to evaluate and improve Genus, a logic synthesis tool used to optimize Power , Performance , and Area (PPA) for advanced digital ASICs. + Analyze and ... validate new features within Genus, ensuring correctness and identifying optimal configurations. + Explore and address challenges in physically aware synthesis, bridging the gap between logic synthesis and place & route. + Support internal teams and customers… more
    Cadence Design Systems, Inc. (10/29/25)
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  • HVAC Technician

    EMCOR Group (Sacramento, CA)
    …of belts and pulleys, inspection and cleaning of condensate drain lines, testing power / performance of compressor, fan motor, blower motor, testing function and ... safety of burners/heat exchangers, function of all safety and operational controls. . General repairs of steam/hot water boiler systems. Diagnose airflow and ducting repairs. . Safe, efficient, and EPA compliant use of refrigerants in support of standard… more
    EMCOR Group (10/24/25)
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  • HVAC Technician

    EMCOR Group (Wilton, CT)
    …of belts and pulleys, inspection and cleaning of condensate drain lines, testing power / performance of the compressor, fan motor, blower motor, testing function ... and safety burners/heat exchangers, function of all safety and operational controls. + General repairs of steam/hot water boiler systems. Diagnose airflow and ducting repairs. + Safe, efficient, and EPA compliant use of refrigerants in support of standard… more
    EMCOR Group (10/17/25)
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  • DSP or Serdes RTL Sr Principal Digital Design…

    Cadence Design Systems, Inc. (San Jose, CA)
    …Ethernet protocol is a plus. + Understanding of digital architecture trade-offs for power , performance , and area + Understanding of proper handling of multiple ... asynchronous clock domains and their crossings + Understanding of Lint checks and proper resolution of errors + Understanding synthesis timing constraints, static timing analysis and constraint development + Understanding of fundamental physical design flows… more
    Cadence Design Systems, Inc. (10/17/25)
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  • Sr. Hardware Engineer - ML Acceleration, Annapurna…

    Amazon (Cupertino, CA)
    …or related field - Experience in RTL coding and debug, as well as performance , power , area analysis and trade-offs - Experience with modern ASIC/FPGA design ... be constantly looking for ways to improve your products performance , quality and cost. We're changing an industry, and...trust our robust suite of products and services to power their businesses. Utility Computing (UC) AWS Utility Computing… more
    Amazon (01/04/26)
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