• Sr Principal Product Engineer - Memory IP

    Cadence Design Systems, Inc. (San Jose, CA)
    …and communication skills. Preferred / Optional Skills + Exposure to STA and RTL flows would be beneficial. + Familiarity with advanced mixed-signal verification and ... system simulation tools is a plus. Why Join Us? + Work on cutting-edge memory technologies impacting next-generation systems. + Collaborate with global teams and industry-leading customers. + Competitive compensation and benefits package. + Opportunities for… more
    Cadence Design Systems, Inc. (11/22/25)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …Lead with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT ... requirements early in the design cycle. As a member of this team you will also be involved in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and post… more
    Cisco (11/22/25)
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  • Senior FPGA Engineer

    Curtiss-Wright Corporation (Ashburn, VA)
    …Gz data rates. + Strong understanding of FPGA design flow, including RTL design (System Verilog, Verilog, or VHDL), simulation, synthesis, and timing closure. ... + Proven problem-solving and debugging skills, with hands-on experience using lab equipment (oscilloscopes, logic analyzers, etc.). + Experience leading projects or mentoring team members is preferred. + US Citizenship is mandatory; Active security clearance… more
    Curtiss-Wright Corporation (11/21/25)
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  • Principal/ Senior Principal ASIC DFT Engineer

    Northrop Grumman (Linthicum Heights, MD)
    …with ASIC development process. + Knowledgeable in VHDL, Verilog or SystemVerilog RTL coding and be highly proficient in DFT methodologies. + Responsible for ... operating in a team environment and collaborate across the different teams as required to accomplish the goals. **Principal Engineer Basic Qualifications:** + Bachelor's degree with 5 years of experience, a Master's degree with 3 years of experience or a Ph.D.… more
    Northrop Grumman (11/21/25)
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  • Senior SoC Power Architect

    NVIDIA (Santa Clara, CA)
    …computing, and other embedded applications. + Working with teams throughout the company ( RTL , PD, Circuit, SI, Thermal, SW, Platform, Operations, Marketing, etc ) to ... deliver outstanding power solutions. + Guiding HW Design teams in evaluating and improving power efficiency of their implementations. + Creating power models of key SoC units to evaluate architectural tradeoffs in DL/ML (training/inference), CPU, GPU, and… more
    NVIDIA (11/20/25)
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  • Design Verification Engineer

    Broadcom (San Jose, CA)
    …verifying designs at system level and block level. + Fluent knowledge of RTL verification methodologies including System Verilog. + Strong experience in ASIC design ... verification flows and DV methodologies + Strong working knowledge of object oriented verification languages (OVM, UVM, etc.), C/C++, Perl, and scripting skills. + Strong and independent design debugging capability. + Strong verbal and written communication… more
    Broadcom (11/20/25)
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  • Interventional Radiology Technologist PRN

    Arkansas Children's (Little Rock, AR)
    …Healthcare Providers (BLS-HCP) - American Heart Association, Radiologic Technologist License ( RTL ) - Arkansas Department of Health - Arkansas Department of Health ... **Recommended Certifications:** **Description** 1. Developing skills to assist Interventional Radiologist or Radiology Assistant during procedure 2. Developing knowledge about utilization of all equipment including emergency equipment, and supplies. 3. Ensures… more
    Arkansas Children's (11/20/25)
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  • ASIC/FPGA Research Engineer - Digital Design

    University of Southern California (Arlington, VA)
    …will work on a cutting-edge team to develop novel computer architectures, RTL models, and systems-on-chip, and will demonstrate system prototypes. Gain experience ... working with top research sponsors such as DARPA, IARPA, and the CHIPS Act. Benefit from a collaborative, flexible university setting with rich learning and growth opportunities. This position does not require any security clearance. The work can be performed… more
    University of Southern California (11/19/25)
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  • Physical Design Engineer

    Broadcom (San Jose, CA)
    …on Calibre LVS/DRC - Low power, signal integrity experience - Work closely with RTL & DFT designers - Strong TCL/Python scripting knowledge required, Perl is a plus. ... - Good debug skill and be able to work around issues - Tape out experience - must be a good team player **Additional Job Description:** **Compensation and Benefits** The annual base salary range for this position is $120,000 - $192,000 This position is also… more
    Broadcom (11/19/25)
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  • Senior Circuit Design Engineer - Power Modeling…

    NVIDIA (Santa Clara, CA)
    …and simulation using Matlab/Simulink, Simplis, Spice, verilogAMS, mixed-signal RTL +spice, s-parameters, etc. + Familiarity/experience with industry-standard design ... and EDA tools (Cadence Virtuoso, Allegro) and circuit simulation tools (HSpice, Spectre, Primesim, XA, etc) Ways to stand out from the crowd: + Hands-on experience modeling and simulating complex and sophisticated power delivery networks for CPU/GPU. +… more
    NVIDIA (11/18/25)
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