• Digital Design Engineer

    Meta (Sunnyvale, CA)
    …1. Responsible for top-level or block level uArchitecture definition and RTL implementation 2. Contribute to chip-level integration, verification plan development ... 2+ years of experience as a Digital Design Engineer 9. Experience in RTL coding, synthesis and/or SoC Integration 10. Experience in digital design Micro-architecture… more
    Meta (12/20/25)
    - Related Jobs
  • Circuit Design Intern (Summer 2026)

    Global Foundries (Austin, TX)
    …and industry wide used cores to analyze GF technologies as well as RTL analysis and simulation of the cores to ensure correct implementation. Essential ... libraries and memory libraries in multiple GF technologies + RTL simulation and verification for power benchmarking + Circuit...enhancement + TCl /PERL scripting for physical design and RTL simulation tools + Optimizing stdcell and memory IP… more
    Global Foundries (12/20/25)
    - Related Jobs
  • ASIC/FPGA Design Engineer (SMES)

    L3Harris (Camden, NJ)
    …engineering specifications from system requirements and developing detailed architecture + Execute design ( RTL AND/OR HLS (C++ to RTL )) and RTL quality ... (RDC, CDC, Formal, Lint) + Generate test plans + Perform module level verification, synthesis/STA, Lab debug, SW driven validation on Linux based SOC evaluation boards + Silicon/FPGA bring up, characterization and production ramp/support/collateral… more
    L3Harris (12/20/25)
    - Related Jobs
  • Datacenter Resiliency Architect - New College Grad

    NVIDIA (Santa Clara, CA)
    …run, and debug tests on Architecture models. Support test debug on RTL , emulation, and silicon. + Run simulations to analyze Architectural Vulnerability Factor ... various fault types (eg, transient faults, stuck-at faults) in gate-level netlist, RTL , architectural model, silicon and other environments. What we need to see:… more
    NVIDIA (12/18/25)
    - Related Jobs
  • CPU Core Logic Designer

    Intel Corporation (Folsom, CA)
    …but are not limited to: + Develops the logic design, register transfer level ( RTL ) coding, and simulation for a CPU required to generate cell libraries, functional ... + Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to...correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. + Documents… more
    Intel Corporation (12/17/25)
    - Related Jobs
  • Principal Electrical Engineer - ASIC/FPGA (Onsite)

    RTX Corporation (El Segundo, CA)
    …Do:** + Requirements capture, ASIC / FPGA digital architecture and design using RTL , timing closure, verification, and system integration + Recommend new tools and ... related field and minimum 5 years of experience + RTL coding and simulation in VHDL or Verilog +...timing closure + Testbench development for the verification of RTL blocks using VHDL or System Verilog + Proficiency… more
    RTX Corporation (12/17/25)
    - Related Jobs
  • Senior ASIC Design Engineer (NetSec)

    Palo Alto Networks (Santa Clara, CA)
    …+ **Write** clear design and micro-architecture specifications. + **Design** SystemVerilog RTL that meets area, performance, and power targets. + **Verify** your ... features. + **Partner** with physical-design teams: review synthesis/timing reports, rewrite RTL to close critical paths, and consult on floor-planning for… more
    Palo Alto Networks (12/15/25)
    - Related Jobs
  • Senior ASIC Design Engineer, Hardware Compute…

    Amazon (Sunnyvale, CA)
    …multiple disciplines * Develop detailed design specifications and documentation * Perform RTL coding and synthesis * Work with Partners/Suppliers to optimize and ... plan and coverage reviews The ideal candidate should have experience with RTL development environments and fluency in modern hardware description languages. They… more
    Amazon (12/12/25)
    - Related Jobs
  • Senior Digital Design Engineer

    BrainChip, Inc. (Laguna Hills, CA)
    …Specification, develop a feasible micro architecture, implement the function using RTL language, verify the functionality, and follow up until completion of ... gather the relevant information, and develop a solution. Use RTL language to design the digital functional modules. Program,...tools to check the functionalities of the designs in RTL and gate level. Collaborate with other team members… more
    BrainChip, Inc. (12/11/25)
    - Related Jobs
  • Hardware FPGA Design Engineer - Acacia (Hybrid)

    Cisco (Maynard, MA)
    …Contribute to FPGA Emulation of ASIC Blocks * Contribute to our custom ASIC RTL code **Minimum Q** **ualifications:** * Bachelors +8 years of experience, or Masters ... FPGA design and verification experience * Experience in Verilog RTL coding and synthesis for FPGAs * Experience with...FPGAs * Expertise in creating FPGA implementations from ASIC RTL code * Expertise in digital design of standard… more
    Cisco (12/11/25)
    - Related Jobs