• Sr. Specialist, Electrical Engineer (ASIC / FPGA…

    L3Harris (Herndon, VA)
    …specifications from system requirements and develop detailed architecture. + Plan and execute design ( RTL AND/OR HLS (C++ to RTL )) and RTL quality (RDC, ... CDC, Formal, Lint). + Generate test plans. + Perform module level verification, synthesis/STA, Lab debug, SW driven validation on Linux based SOC evaluation boards. + Silicon/FPGA bring up, characterization and production ramp/support/collateral.… more
    L3Harris (10/26/25)
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  • Senior FPGA Design Engineer (Hybrid-Puerto Rico)

    RTX Corporation (Aguadilla, PR)
    …+ Requirements capture, ASIC / FPGA digital architecture and design using RTL , timing closure, verification, and system integration + Recommend new tools and ... to access information under this program/contract. **Qualifications We Prefer:** + RTL coding and simulation in VHDL, Verilog, or SystemVerilog experience +… more
    RTX Corporation (10/18/25)
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  • Senior DFT Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …3+ years, or PhD with 2+ years of experience in DFT, system architecture, or RTL design. + Understanding of fundamental DFT topics, such as, fault modeling, ATPG and ... and dielet/chiplet based designs, and UCIe protocol. + Good understanding of RTL coding principles. + Knowledge of high-speed interface architectures such as PCIe,… more
    NVIDIA (10/17/25)
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  • Principal Electrical Engineer - ASIC/FPGA (Onsite)

    RTX Corporation (Salt Lake City, UT)
    …Do:** + Requirements capture, ASIC / FPGA digital architecture and design using RTL , timing closure, verification, and system integration + Recommend new tools and ... to a government security investigation/reinstatement and must meet eligibility requirements + RTL coding and simulation in Verilog or VHDL + Digital circuit… more
    RTX Corporation (10/16/25)
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  • Senior Circuit Design Engineer

    NVIDIA (Santa Clara, CA)
    …+ You'll drive the design and physical implementation of custom digital IPs from RTL to layout using industry standard tools and custom design flows. + Collaborate ... power circuits (power gating, decaps, multi-vt, etc..) is a plus. + Experience with RTL , logic synthesis and verification is a plus. + Mixed signal circuit design… more
    NVIDIA (10/10/25)
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  • Senior FPGA/ASIC Engineer (Onsite)

    RTX Corporation (Cedar Rapids, IA)
    …and traceability. + ASIC/FPGA/SoPC digital architecture development and design. + Develop RTL design code and simulation in VHDL, Verilog, and/or SystemVerilog. + ... a related field and minimum 3 years of experience. + Experience writing RTL and testbenches using VHDL, Verilog, or SystemVerilog. + Experience using FPGA specific… more
    RTX Corporation (01/01/26)
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  • Sr. DSP Engineer (Starship Avionics)

    SpaceX (Hawthorne, CA)
    …including modem performance + Support FPGA designers with bit-accurate and cycle-accurate RTL verification + Own the end-to-end results of your products, from ... using the Xilinx toolchain + Experience with verification between simulation and RTL FPGA implementation + Experience modeling RF and channel impairments such as… more
    SpaceX (01/01/26)
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  • Principal ASIC Design Engineer (Silicon…

    SpaceX (Redmond, WA)
    …performance requirements and system limitations + Define micro-architecture, implement the RTL in Verilog/System Verilog, integrate that in top level and deliver ... computer engineering, or computer science + 10+ years of experience in RTL implementation and/or FPGA/ASIC development PREFERRED SKILLS AND EXPERIENCE: + Experience… more
    SpaceX (01/01/26)
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  • Senior Engineer - Design for Test (DFT)

    Microsoft Corporation (Hillsboro, OR)
    …test plans and engage closely with verification engineers to perform waveform reviews. + Ensure RTL quality pre-DFT to ensure the RTL is good for DFT insertion ... and coverage. + Hold a primary role in enabling silicon by working directly with test engineers to bring up test vectors, and analyzing yield & diagnosis. + Work as part of DFX (Test & Debug) team & closely collaborate with highly energetic cross functional… more
    Microsoft Corporation (12/31/25)
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  • Senior ASIC Power Engineer, ML Accelerators

    Google (Sunnyvale, CA)
    …experience in logic design, digital ASIC, or SoC design. + Experience with RTL (Register Transfer Level) design using Verilog or SystemVerilog. + Experience with ... optimization techniques. + Define best practices and methodologies to achieve low-power RTL designs. + Collaborate with cross-functional software and system teams to… more
    Google (12/30/25)
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