• Senior Datacenter Resiliency Architect

    NVIDIA (Santa Clara, CA)
    …run, and debug tests on Architecture models. Support test debug on RTL , emulation, and silicon. + Run simulations to analyze Architectural Vulnerability Factor ... various fault types (eg, transient faults, stuck-at faults) in gate-level netlist, RTL , architectural model, silicon and other environments. What we need to see:… more
    NVIDIA (11/15/25)
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  • Digital Design: SerDes Digital IP Design Engineer

    Broadcom (Fort Collins, CO)
    …and documentation for SerDes development. Performs architecture design, rtl development, constraints, synthesis, timing analysis, verification, documentation, and ... Knowledge of all aspects of the process flow from high-level RTL design to synthesis, RTL / netlist audits (using tools such as Spyglass), Formal verification,… more
    Broadcom (11/12/25)
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  • Senior ASIC Design Engineer - Clocks IP

    NVIDIA (Santa Clara, CA)
    …and Ease of timing closure to innovate and implement new Clocking topologies in RTL . + Collaborate with Physical design and timing team to evaluate Clocking concerns ... + Together with other team members, we deliver clock RTL information to GPU, CPU and SOC verification team,...ability to collaborate with multiple teams. + Experience in RTL design (Verilog), verification and logic synthesis. + Strong… more
    NVIDIA (10/28/25)
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  • Senior FPGA Design Engineer (Hybrid-Puerto Rico)

    RTX Corporation (Aguadilla, PR)
    …+ Requirements capture, ASIC / FPGA digital architecture and design using RTL , timing closure, verification, and system integration + Recommend new tools and ... to access information under this program/contract. **Qualifications We Prefer:** + RTL coding and simulation in VHDL, Verilog, or SystemVerilog experience +… more
    RTX Corporation (10/18/25)
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  • Senior DFT Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …3+ years, or PhD with 2+ years of experience in DFT, system architecture, or RTL design. + Understanding of fundamental DFT topics, such as, fault modeling, ATPG and ... and dielet/chiplet based designs, and UCIe protocol. + Good understanding of RTL coding principles. + Knowledge of high-speed interface architectures such as PCIe,… more
    NVIDIA (10/17/25)
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  • Principal Electrical Engineer - ASIC/FPGA (Onsite)

    RTX Corporation (Salt Lake City, UT)
    …Do:** + Requirements capture, ASIC / FPGA digital architecture and design using RTL , timing closure, verification, and system integration + Recommend new tools and ... to a government security investigation/reinstatement and must meet eligibility requirements + RTL coding and simulation in Verilog or VHDL + Digital circuit… more
    RTX Corporation (10/16/25)
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  • Engineer V

    General Atomics (Englewood, CO)
    …and control systems. + Develop and optimize FPGA architectures, including RTL (Register Transfer Level) coding, simulation, synthesis, and timing analysis. + ... lieu of education. **Required Experience:** + Expertise in FPGA design, including RTL coding (eg, Verilog, VHDL) and development for high-speed data processing… more
    General Atomics (01/08/26)
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  • Retail Assistant Manager - Full-Time

    maurices (Cedar Rapids, IA)
    …Manager - Full-Time to join our team located at our Store 1667-Super Target Rtl Ctr-maurices-Cedar Rapids, IA 52404. Ready to help bring feel good fashion for real ... maurices is an equal opportunity employer. Location: Store 1667-Super Target Rtl Ctr-maurices-Cedar Rapids, IA 52404 Position Type: Regular/Full time Benefits… more
    maurices (01/08/26)
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  • Senior ASIC Physical Design Engineer, Netlisting

    NVIDIA (Santa Clara, CA)
    …years' experience. + Expertise in logic equivalence checking/FV required from RTL to tapeout with industry-standard tools. Deep understanding of hardware ... architecture and hands-on skills in RTL /logic design for timing closure. + Experience in clock-domain-crossing checking, MTBF analysis, either with industry-standard… more
    NVIDIA (01/08/26)
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  • Sr. FPGA Engineer (Starshield)

    SpaceX (Hawthorne, CA)
    …SpaceX satellite spacecraft + Implement logic designs and signals processing algorithms in RTL + Integrate designs onto FPGA/SoC platforms + Bring up and validate ... digital designs + Experience in different stages of FPGA development: RTL design, verification, synthesis, timing analysis, lab bring up/validation + Experience… more
    SpaceX (01/07/26)
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