- Palo Alto Networks (Santa Clara, CA)
- …Impact** + **Write** clear design and micro-architecture specifications. + ** Design ** SystemVerilog RTL that meets area, performance, and power targets. ... close coverage, and add design -for-debug features. + **Partner** with physical- design teams: review synthesis/timing reports, rewrite RTL to close critical… more
- Microsoft Corporation (Hillsboro, OR)
- …to customers and partners worldwide and we are looking for a **Senior Physical Design Engineer ** to help achieve that mission. The Compute Silicon & ... cloud hardware. We are looking for a **Senior Physical Design Engineer ** with a passion for customer...block, subsystem, and top level. + Coordinate with CAD, RTL / Design teams/DFT, Architecture team, Foundry interface team,… more
- Microsoft Corporation (Hillsboro, OR)
- …to customers and partners worldwide and we are looking for a **Principal Physical Design Engineer ** to help achieve that mission. The Compute Silicon & ... Microsoft cloud hardware.We are looking for a **Principal Physical Design Engineer ** with a passion for customer...Design Planning and partitioning strategies. + Responsible for RTL to GDS implementation in Physical Design … more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer , you'll join a group of hard-working engineers ... have the opportunity to be responsible for micro-architecture and design including RTL design , synthesis,...+ BS, MS, or PhD in Electrical Engineering, Computer Engineer , or related degree required (or equivalent experience) +… more
- ManpowerGroup (Redmond, WA)
- …C/C++, Python, Perl, and/or PowerShell for scripting and automation. + Experience with RTL design and verification, including CDC, lint, and synthesis. + ... leader in the semiconductor industry, is seeking a Hardware Design & Validation Engineer - AI Semiconductor...Contract **Pay Range:** Not disclosed **What's the Job?** + Design , implement, and verify RTL blocks for… more
- Lockheed Martin (Chelmsford, MA)
- **Description:** You will be the FPGA Design Engineer for the FPGA & Digital Design team at Lockheed Martin's Chelmsford, MA campus\. Our team is responsible ... systems\. **What You Will Be Doing** As the FPGA Design Engineer you will help turn challenging...DSP, encryption, networking, and microwave circuit control\. * Developing RTL logic, register transfer level \( RTL \) code,… more
- Google (Sunnyvale, CA)
- …within AI/ML-driven systems. As a System on a Chip (SoC) Physical Design Engineer , you will collaborate with Register-Transfer Level ( RTL ), Design for ... SoC Physical Design Engineer _corporate_fare_ Google _place_ Sunnyvale,...of the subchip and individual blocks from Register-Transfer Level-to-Graphic Design System . + Collaborate with RTL /… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll collaborate with brilliant minds to build cutting-edge GPUs ... everything from AI to gaming! As a Senior SOC Design Engineer , you'll work at the forefront...+ Strong analytical and problem-solving skills + Expertise in RTL design , SOC integration, and design… more
- Google (Sunnyvale, CA)
- …and its integration within AI/ML-driven systems. As a Physical Design Engineer , you will collaborate with Register-Transfer Level ( RTL ), Design ... Physical Design Engineer , University Graduate, PhD _corporate_fare_...of the subchip and individual blocks from Register-Transfer Level-to-Graphic Design System (RTL2GDSII). + Collaborate with RTL /… more
- Google (Fremont, CA)
- Staff Silicon Design Engineer , Raxium _corporate_fare_ Google _place_ Fremont, CA, USA **Advanced** Experience owning outcomes and decision making, solving ... experience. + 10 years of experience with digital logic design principles, RTL design concepts,...video processing. **About the job** As a Staff Silicon Design Engineer , you will join our innovative… more