• FPGA Design Engineer Sr. Staff

    Lockheed Martin (Chelmsford, MA)
    **Description:** You will be the FPGA Design Engineer for the FPGA & Digital Design team at Lockheed Martin's Chelmsford, MA campus\. Our team is responsible ... systems\. **What You Will Be Doing** As the FPGA Design Engineer you will help turn challenging...DSP, encryption, networking, and microwave circuit control\. * Developing RTL logic, register transfer level \( RTL \) code,… more
    Lockheed Martin (12/04/25)
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  • Hardware Design & Validation…

    ManpowerGroup (Redmond, WA)
    …C/C++, Python, Perl, and/or PowerShell for scripting and automation. + Experience with RTL design and verification, including CDC, lint, and synthesis. + ... leader in the semiconductor industry, is seeking a Hardware Design & Validation Engineer - AI Semiconductor...Contract **Pay Range:** Not disclosed **What's the Job?** + Design , implement, and verify RTL blocks for… more
    ManpowerGroup (09/23/25)
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  • Staff Logic Circuit Design Engineer

    Micron Technology, Inc. (Folsom, CA)
    …5+ years of proven digital design experience. + Strong foundation in digital design and RTL development. + Solid understanding of timing, area, power, and ... learn, communicate and advance faster than ever. A HBM RTL designer will need to have significant experience front...will need to have significant experience front end digital design ! The designer will be responsible for the development… more
    Micron Technology, Inc. (11/20/25)
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  • Sr. ASIC Design Engineer

    Amazon (Cupertino, CA)
    … quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, area and ... Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers...power-efficient RTL designs to meet project specifications and targets *… more
    Amazon (12/13/25)
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  • TPU Design Engineer , Silicon

    Google (San Diego, CA)
    TPU Design Engineer , Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA; San Diego, CA, USA **Mid** Experience driving progress, solving problems, ... equivalent practical experience. + 4 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or… more
    Google (11/12/25)
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  • ASIC Engineer , Physical Design

    Meta (Sunnyvale, CA)
    …placement and routing, to improve performance and power 5. Work with the RTL design team to understand partition architecture and drive physical aspects ... and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and...the design cycle 6. Interface with the RTL design team to drive design more
    Meta (11/05/25)
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  • Senior CPU Design Engineer

    NVIDIA (Hillsboro, OR)
    We are looking for a Senior CPU Design Engineer ! NVIDIA is seeking best-in-class CPU Design Engineers to design the world's leading CPUs. This position ... CPU team is looking for inquisitive, motivated engineers with design experience to build ground-breaking CPUs. As a senior...studies and documentation of CPU sub-systems. + Implement in RTL and coordinate execution with the verification team to… more
    NVIDIA (09/16/25)
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  • Senior Applications Engineer - DDR…

    Cadence Design Systems, Inc. (San Jose, CA)
    …on memory subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA design * ... an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San...opportunities* Run Verilog simulations to enable IP benchmarking* Run RTL synthesis for area and timing analysis* Present IP… more
    Cadence Design Systems, Inc. (10/11/25)
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  • ASIC/FPGA Design Engineer (Compute…

    Teradyne (North Reading, MA)
    …business results. Opportunity Overview Our Hardware Engineering team is seeking an FPGA/ASIC Design Engineer to work with a multi-disciplined team to design ... environment. + Deriving requirements from higher level specifications + Writing design documents + Designing and implementing register-transfer-level ( RTL ) code… more
    Teradyne (11/25/25)
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  • IC Design Engineer

    Broadcom (Irvine, CA)
    …Account, please Sign-In before you apply.** **Job Description:** **Job Description: IC Design Engineer ** + Participate in IP level architectural definition ... including micro-architecture definition + Perform RTL design using Verilog HDL, with an emphasis on performance and area + Implement multi-power and low-power… more
    Broadcom (11/18/25)
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